SAB 82525
SAB 82526
SAF 82525
SAF 82526
Pin Definitions and Functions (cont’d)
Pin No.
Symbol Input (I)
Function
Output (O)
P-LCC P-MQFP
9
16
14
21
RXDA
RXDB
I
Receive Data (channel A/channel B)
Serial data is received on these pins at standard TTL or
CMOS levels.
10
15
15
20
O
Request to Send (channel A/channel B)
RTSA
RTSB
When the RTS bit in the mode register is set, the RTS
signal goes low. When the RTS is reset, the signal goes
high if the transmitter has finished and there is no further
request for a transmission.
In a bus configuration, this pin can be programmed via
CCR2 to:
– go low during the actual transmission of a frame shifted
by one clock period, excluding collision bits
– go low during the reception of a data frame
– stay always high (RTS disabled).
11
14
16
19
CTSA/
CXDA
CTSB/
CXDB
I
Clear to Send (channel A/channel B)
A low on the CTS inputs enables the respective transmitter.
Additionally, an interrupt may be issued if a state transition
occurs at the CTS pin (programmable feature). If no "Clear
To Send" function is required, the CTS inputs can be
connected directly to VSS.
Collision Data (channel A/channel B)
In a bus configuration, the external serial bus must be
connected to the respective C × D pin for collision
detection.
12
13
17
18
TXDA
TXDB
O
Transmit Data (channel A/channel B)
Transmit data is shifted out via these pins at standard TTL
or CMOS levels. These pins can be programmed to work
either as push-pull, or open drain outputs supporting bus
configurations.
17
22
RES
I
RESET
A high signal on this input forces the HSCX into the reset
state. The HSCX is in power-up mode during reset and in
power-down mode after reset. The minimum pulse width is
1.8 µs.
Semiconductor Group
11
SIEMENS [ Siemens Semiconductor Group ]
