SAB 82525
SAB 82526
SAF 82525
SAF 82526
7
Operational Description
7.1 RESET
The HSCX is forced into the reset state if a high signal is input to the RES pin for a minimum
period of 1.8 µs. During RESET, the HSCX is temporarily in the power-up mode, and a subset
of the registers is initialized with defined values.
After RESET, the HSCX is in power down mode, and the following registers contain defined
values:
Table 7
RESET Values
RESET
Register
Value
Meaning
CCR1
00
– power down mode
H
serial port configuration; pt-pt, NRZ coding, transmit data pins
are open drain outputs
– clock mode 0
CCR2
00
00
RTS pin normal function
– CTS and RFS interrupts disabled no data inversion
H
H
MODE
auto-mode
1 byte address field
external timer mode
– receivers inactive
RTS output controlled by HSCX, timer resolution:
k = 32.768, no testloop
STAR
48
00
XFIFO write enable
receive line inactive
no commands executing
H
H
ISTA
EXIR
– no interrupts masked
CMDR
00
00
no commands
H
H
XBCH
RBCH
– interrupt controlled data transfer (DMA disabled)
– full-duplex LAPB/LAPD operation of LAP controller
– carrier detect auto start of receiver disabled
XCCR
RCCR
00
1-bit time-slot
H
Semiconductor Group
69
SIEMENS [ Siemens Semiconductor Group ]
