SAB 82525
SAB 82526
SAF 82525
SAF 82526
b) delay the rising edge of RTS (e.g. for NRM mode with balanced bus).
RTS
&
D Q
CLK
D Q
CLK
HSCX
_
<
1
TxCLK
TxD
Bus
ITD05966
Figure 26
Timing diagram for recommendation b):
Time-Slot n
Time-Slot n + 1
TxCLK
(TS-Ctrl)
IDLE, interframe time-fill
TxD
DDD...D
D
D = Valid data bits
Last bit of a frame
Last bit of a closing flag
RTS
RTS
ideal
RTS
(rec. b)
INT
XPR Int Status
ITD05981
Figure 27
Semiconductor Group
54