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SAB82525N 参数 Datasheet PDF下载

SAB82525N图片预览
型号: SAB82525N
PDF下载: 下载PDF文件 查看货源
内容描述: 高层次的串行通信 [High-Level Serial Communication]
分类和应用: 通信
文件页数/大小: 126 页 / 741 K
品牌: SIEMENS [ Siemens Semiconductor Group ]
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SAB 82525  
SAB 82526  
SAF 82525  
SAF 82526  
The four selector channels of ADMA are used for serving the four DMA request sources of  
HSCX, allowing very high data rates at both the system bus and the serial channels.  
Another big advantage of the ADMA is it’s data chaining feature, providing an optimized  
memory management for receive and transmit data. Recording the HSCX, a linked chain of 32  
byte deep buffers can be set up, which are subsequently filled with the contents of the HSCX’s  
FIFOs during reception. Not used buffers can be saved and linked to another buffer chain  
reserved for the reception of the next frame.  
As a result, it’s not necessary to reserve a very large space in system memory, determined by  
the maximum frame length of every received frame.  
In this example, the ADMA works directly at the CPU’s local bus and shares the same bus  
interface logic (address latches, transceivers, bus controller) with the SAB 80186. Since one  
DMA acknowledge line is provided for each DMA request, two DACK outputs must be ANDed  
together for input to the HSCX.  
The HSCX’s data lines are connected to the lower half of the system data bus (D0 … D7) and  
the address lines to A1 … A7, thus (from the CPU’s point of view) all internal register  
addresses must be multiplied by two (even register addresses only).  
e.g. CMDR register: HSCX address 61 < = > system address C2 .  
H
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1.3 Functional Description  
General  
The HSCX distinguishes from other low level HDLC devices by its advanced characteristics.  
The most important are:  
Enlarged support of link configurations.  
Beyond the point-to-point configurations, the HSCX directly enables point-to-multipoint or  
multimaster configurations without additional hardware or software expense.  
In point-to-multipoint configurations, the HSCX can be used as a master as well as a slave  
station. Even when working as slave station, the HSCX can initiate the transmission of data at  
any time. An internal function block provides means of idle and collision detection and collision  
resolution, which are necessary if several stations start transmitting simultaneously.  
These features were integrated to support multimaster configurations.  
Semiconductor Group  
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