AOT424 参数 Datasheet PDF下载

AOT424

N-Channel Enhancement Mode Field

Effect Transistor

Electrical Characteristics (T

J

=25°C unless otherwise noted)

Symbol

Parameter

Conditions

I

D

=250µA, V

GS

=0V

V

DS

=24V, V

GS

=0V

T

J

=55°C

V

DS

=0V, V

GS

= ±20V

V

DS

=V

GS

I

D

=250µA

V

GS

=10V, V

DS

=5V

V

GS

=10V, I

D

=30A

R

DS(ON)

g

FS

V

SD

I

S

Static Drain-Source On-Resistance

V

GS

=4.5V, I

D

=30A

Forward Transconductance

Diode Forward Voltage

V

DS

=5V, I

D

=30A

I

S

=1A,V

GS

=0V

T

J

=125°C

1

110

3

4.7

4.3

106

0.72

1

85

3700

V

GS

=0V, V

DS

=15V, f=1MHz

V

GS

=0V, V

DS

=0V, f=1MHz

700

390

0.54

59.6

V

GS

=10V, V

DS

=15V, I

D

=30A

30.4

9.5

19.8

12.5

V

GS

=10V, V

DS

=15V, R

L

=0.5Ω,

R

GEN

=3Ω

I

F

=30A, dI/dt=100A/µs

2

Min

30

Typ

Max

Units

V

STATIC PARAMETERS

Drain-Source Breakdown Voltage

BV

DSS

I

DSS

I

GSS

V

GS(th)

I

D(ON)

Zero Gate Voltage Drain Current

Gate-Body leakage current

Gate Threshold Voltage

On state drain current

1

5

100

2

3

4

6

5.5

µA

nA

V

A

mΩ

mΩ

S

V

A

pF

pF

pF

Maximum Body-Diode Continuous Current

DYNAMIC PARAMETERS

C

iss

Input Capacitance

C

oss

C

rss

R

g

Output Capacitance

Reverse Transfer Capacitance

Gate resistance

4400

0.7

72

37

Ω

nC

nC

nC

nC

ns

ns

ns

ns

SWITCHING PARAMETERS

Q

g

(10V) Total Gate Charge

Q

g

(4.5V) Total Gate Charge

Q

gs

Q

gd

t

D(on)

t

r

t

D(off)

t

f

t

rr

Q

rr

Gate Source Charge

Gate Drain Charge

Turn-On DelayTime

Turn-On Rise Time

Turn-Off DelayTime

Turn-Off Fall Time

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge I

F

=30A, dI/dt=100A/µs

35.5

40

32.5

35.3

30.7

42

ns

nC

A: The value of R

θJA

is measured with the device mounted on 1in FR-4 board with 2oz. Copper, in a still air environment with T

A

=25°C. The Power

dissipation P

DSM

is based on steady-state R

θJA

and the maximum allowed junction temperature of 150°C. The value in any given application depends

on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB or heatsink allows it.

B. The power dissipation P

D

is based on T

J(MAX)

=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation

limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.

C: Repetitive rating, pulse width limited by junction temperature T

J(MAX)

=175°C.

D. The R

θJA

is the sum of the thermal impedence from junction to case R

θJC

and case to ambient.

E. The static characteristics in Figures 1 to 6 are obtained using <300

µs

pulses, duty cycle 0.5% max.

F. These tests are performed with the device mounted on 1 in FR-4 board with 2oz. Copper, in a still air environment with T

A

=25°C. The SOA curve

provides a single pulse rating.

G. The maximum current rating is limited by the package current capability.

Rev4: July 2008

2

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