AOD407 参数 Datasheet PDF下载

AOD407

P-Channel Enhancement Mode Field

Effect Transistor

Electrical Characteristics (T

J

=25°C unless otherwise noted)

Symbol

Parameter

Conditions

I

D

=-250µA, V

GS

=0V

V

DS

=-48V, V

GS

=0V

T

J

=55°C

V

DS

=0V, V

GS

=±20V

V

DS

=V

GS

I

D

=-250µA

V

GS

=-10V, V

DS

=-5V

V

GS

=-10V, I

D

=-12A

R

DS(ON)

g

FS

V

SD

I

S

Static Drain-Source On-Resistance

V

GS

=-4.5V, I

D

=-8A

Forward Transconductance

V

DS

=-5V, I

D

=-12A

I

S

=-1A,V

GS

=0V

Diode Forward Voltage

Maximum Body-Diode Continuous Current

T

J

=125°C

-1.5

-30

91

150

114

12.8

-0.76

-1

-12

987

V

GS

=0V, V

DS

=-30V, f=1MHz

V

GS

=0V, V

DS

=0V, f=1MHz

114

46

7

15.8

V

GS

=-10V, V

DS

=-30V, I

D

=-12A

7.4

3

3.5

9

V

GS

=-10V, V

DS

=-30V, R

L

=2.5Ω,

R

GEN

=3Ω

I

F

=-12A, dI/dt=100A/µs

10

25

11

27.5

30

35

10

20

9

1185

150

115

-2.1

Min

-60

-0.003

-1

-5

±100

-3

Typ

Max

Units

V

µA

nA

V

A

mΩ

mΩ

S

V

A

pF

pF

pF

Ω

nC

nC

nC

nC

ns

ns

ns

ns

ns

nC

STATIC PARAMETERS

BV

DSS

Drain-Source Breakdown Voltage

I

DSS

I

GSS

V

GS(th)

I

D(ON)

Zero Gate Voltage Drain Current

Gate-Body leakage current

Gate Threshold Voltage

On state drain current

DYNAMIC PARAMETERS

C

iss

Input Capacitance

C

oss

C

rss

R

g

Output Capacitance

Reverse Transfer Capacitance

Gate resistance

SWITCHING PARAMETERS

Q

g

(10V) Total Gate Charge (10V)

Q

g

(4.5V) Total Gate Charge (4.5V)

Q

gs

Q

gd

t

D(on)

t

r

t

D(off)

t

f

t

rr

Q

rr

Gate Source Charge

Gate Drain Charge

Turn-On DelayTime

Turn-On Rise Time

Turn-Off DelayTime

Turn-Off Fall Time

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge I

F

=-12A, dI/dt=100A/µs

A: The value of R

θJA

is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T

A

=25°C. The

Power dissipation P

DSM

is based on R

θJA

and the maximum allowed junction temperature of 150°C. The value in any given application

depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.

B. The power dissipation P

D

is based on T

J(MAX)

=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper

dissipation limit for cases where additional heatsinking is used.

C: Repetitive rating, pulse width limited by junction temperature T

J(MAX)

=175°C.

D. The R

θJA

is the sum of the thermal impedence from junction to case R

θJC

and case to ambient.

E. The static characteristics in Figures 1 to 6 are obtained using <300

µs

pulses, duty cycle 0.5% max.

F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,

assuming a maximum junction temperature of T

J(MAX)

=175°C.

G. The maximum current rating is limited by bond-wires.

H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T

A

=25°C. The SOA

curve provides a single pulse rating.

*This device is guaranteed green after data code 8X11 (Sep 1

ST

2008).

Rev 7 : May 2010

2/6

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