欢迎访问ic37.com |
会员登录 免费注册
发布采购

SC420AIMLTRT 参数 Datasheet PDF下载

SC420AIMLTRT图片预览
型号: SC420AIMLTRT
PDF下载: 下载PDF文件 查看货源
内容描述: 高速,组合式SenseTM ,为移动应用程序同步功率MOSFET驱动器 [High Speed, Combi-SenseTM, Synchronous Power MOSFET Driver for Mobile Applications]
分类和应用: 驱动器
文件页数/大小: 16 页 / 744 K
品牌: SEMTECH [ SEMTECH CORPORATION ]
 浏览型号SC420AIMLTRT的Datasheet PDF文件第1页浏览型号SC420AIMLTRT的Datasheet PDF文件第2页浏览型号SC420AIMLTRT的Datasheet PDF文件第3页浏览型号SC420AIMLTRT的Datasheet PDF文件第4页浏览型号SC420AIMLTRT的Datasheet PDF文件第6页浏览型号SC420AIMLTRT的Datasheet PDF文件第7页浏览型号SC420AIMLTRT的Datasheet PDF文件第8页浏览型号SC420AIMLTRT的Datasheet PDF文件第9页  
SC420A  
POWER MANAGEMENT  
Pin Configuration  
Ordering Information  
Device (1)  
Package  
Temp Range (TJ)  
Top View  
(3)  
SC420AIMLTRT  
MLP-12  
-40° to 125°C  
Note:  
(1) Only available in tape and reel packaging. A reel  
contains 3000 devices.  
12  
10  
11  
9
8
7
1
2
BG  
TG  
BST  
CO  
(2) This device is ESD sensitive. Use of standard ESD  
handling precautions is required.  
VIN  
3
CDELAY  
(3) Lead Free package compliant with J-STD-020B.  
Qualified to support maximum IR reflow temperature of  
260oC for 30 seconds.  
6
4
5
(MLP-12)  
Pin Descriptions  
Pin  
#
Pin  
Name  
Pin Function  
1
2
3
4
TG  
BST  
CO  
Output gate drive for the switching (high-side) MOSFET.  
Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap  
voltage for the high-side MOSFET. The capacitor value is typically between 0.1µF and 1µF (ceramic).  
Logic level PWM input signal to the SC420 supplied by external controller.  
Input power (VBAT) to the DC/DC converter. Used as supply reference for internal Combi-Sense TM  
circuitry. Connect as close as possible to Drain of TOP switching MOSFET.  
VIN2  
Active high logic level input signal. A logic High enables TG and BG switching. A low level disables  
5
6
EN  
outputs and reduces quiescent current to IQ  
SD  
Virtual Phase Node. Connect an RC between this pin and the output sense point to Enable Combi-  
Sense TM operation.  
VPN  
The capacitance connected between this pin and GND sets the additional propagation delay for BG  
7
8
CDELAY going low to TG going high. Total propagation delay =20ns + 1ns/pF. If no capacitor is connected, the  
propragation delay = 20ns.  
Input supply for the bottom drive and the Logic. A F-10µF Ceramic Capacitor must be connected  
VIN  
from this pin to PGND, placed less than 0.5" from SC420.  
9
BG  
PGND  
N.C.  
Output drive for the synchronous (bottom) MOSFET.  
Ground. Keep this pin close to the synchronous MOSFETs source.  
No Connect  
10  
11  
This pin connects to the junction of the switching and synchronous MOSFETs . This pin can be subjected  
to a -2V minimum relative to PGND without affecting operation.  
12  
DRN  
2004 Semtech Corp.  
5
United States Patent No. 6,441,597  
www.semtech.com  
 复制成功!