Crystal oscillator
Product Number (please contact us)
CRYSTAL OSCILLATOR
LOW-JITTER SAW OSCILLATOR
Q3802CA00xxxx00
EG - 2002CA
Frequency
range
Operating
voltage
Output
Function
External
dimensions
:
:
:
:
:
62.5 MHz to 170 MHz
3.3 V
LV-TTL
Output enable (OE)
7.0 × 5.0 × 1.2 mm
Actual size
Very
low jitter and low phase noise by SAW unit.
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature
Frequency tolerance *1
Current consumption
Disable current
Symmetry
Output voltage
Output load condition (CMOS)
Input voltage
Rise time / Fall time
Start-up time
Symbol
fo
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
L_CMOS
V
IH
V
IL
t
r
/
t
f
t_str
Jitter *2
Phase Jitter
t
DJ
t
RJ
t
RMS
t
p-p
t
acc
t
PJ
Specifications
62.500 MHz to 170.000 MHz
3.3 V
0.3 V
-40
C
to +100
C
0
C
to +70
C
F,Z:
50
10
-6
, H,Y:
100
10
-6
60 mA Max.
25 mA Max.
45 % to 55 %
2.4 V Min.
0.4 V Max.
25 pF Max.
15 pF Max.
70 % V
CC
Min.
30 % V
CC
Max.
1.5 ns Max.
10 ms Max.
0.2 ps Typ.
3 ps Typ.
3 ps Typ.
25 ps Typ.
4 ps Typ.
1 ps Max.
-6
Conditions / Remarks
Please contact us about available frequencies.
Storage as single product.
OE=V
CC
, No load condition
OE=GND
1.4 V level, L_CMOS
Max.
I
OH
= -8 mA
I
OL
= 8 mA
fo
= 62.5 MHz
fo
> 62.5 MHz
OE terminal
Between 0.8 V and 2.0 V level, L_CMOS
Max.
Time at minimum supply voltage to be 0 s
Deterministic Jitter
Random Jitter
(RMS of total distribution)
Peak to Peak
Accumulated Jitter() n=2 to 50000 cycles
Offset frequency: 12 kHz to 20 MHz
Frequency aging *3
f_aging
5
10 / year Max.
+25
C,
First year, V
CC
=3.3 V
*1 As per table below
*2 Tested using a DTS-2075 Digital timing system made by WAVECREST with jitter analysis software VISI6.
*3 Except : PCH,DCH
Frequency range (MHz)
P: 125 to 170
D: 62.5 to 124.999
-6
PCH
DCH
H:
10010
(0
C
to +70
C)
*4
Y:
10010
-6
(0
C
to +70
C)
*5
PCY
DCY
Frequency tolerance and
operating temperature
Z:
5010
-6
(0
C
to +70
C)
*6
PCZ
DCZ
F:
5010
-6
(0
C
to +70
C)
*5
PCF (125 MHz Only)
-
*4 This includes initial frequency tolerance, temperature variation, supply voltage variation, load variation, reflow drift, and 10 years aging(+25
C,10
years).
*5 This includes initial frequency tolerance, temperature variation, supply voltage variation, load variation, and reflow drift (except aging).
*6 This includes initial frequency tolerance and temperature variation (except supply voltage variation, load variation, reflow drift, and aging).
.
External dimensions
#4
#3
5.0±0.2
#3
1.4
#4
(Unit:mm)
1.1
Footprint (Recommended)
(Unit:mm)
1.8
E 125.000H
2PC924A
#1
7.0±0.2
#2
2.6
#2
1.2±0.2
5.08
#1
Pin map
Pin
Connection
1
OE
2
GND
3
OUT
4
Vcc
#2 is connected to the
cover
5.08
5.08
OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance
To maintain stable operation, provide a 0.01uF to
0.1uF by-pass capacitor at a location as near as
possible to the power source terminal of the
crystal product (between Vcc - GND).
3.9
1.5
SEIKO [ SEIKO EPSON CORPORATION ]
