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EG-2001CA125.0000M-PCYL0 参数 Datasheet PDF下载

EG-2001CA125.0000M-PCYL0图片预览
型号: EG-2001CA125.0000M-PCYL0
PDF下载: 下载PDF文件 查看货源
内容描述: [CLOCK SAW OSCILLATOR, 125MHz, ROHS COMPLIANT, CERAMIC, SMD, 4 PIN]
分类和应用: 输出元件振荡器
文件页数/大小: 2 页 / 266 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
 浏览型号EG-2001CA125.0000M-PCYL0的Datasheet PDF文件第2页  
Crystal oscillator
Product Number (please contact us)
CRYSTAL OSCILLATOR
LOW-JITTER SAW OSCILLATOR
EG-2021CA: Q3807CA00xxxx00
EG-2001CA: Q3801CA00xxxx00
EG - 2021
/
2001CA
62.5 MHz to 250 MHz
2.5 V

EG-2021CA
3.3 V

EG-2001CA
Output
:
CMOS
Function
:
Output enable (OE)
External
dimensions
:
7.0 × 5.0 × 1.2 mm
Very
low jitter and low phase noise by SAW unit.
Frequency
range
Supply
voltage
:
:
Actual size
EG-2021CA
EG-2001CA
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature *1
Frequency tolerance *1
Current consumption
Disable current
Symmetry
Output voltage
Output load condition (CMOS)
Input voltage
Rise time / Fall time
Start-up time
Symbol
Specifications
EG-2021CA
62.500 MHz to
170.001MHz to
170.000MHz
250.000MHz
2.5 V 0.125 V
-40
C
to +100
C
P: 0
C
to +70
C
R: -5
C
to +85
C
G:
50
10
-6
H:
100
10
-6
25 mA Max.
30 mA Max.
600
A
Max.
45 % to 55 %
40 % to 60 %
V
CC
-0.35 V Min.
0.35 V Max.
15 pF Max.
70 % V
CC
Min.
30 % V
CC
Max.
2 ns Max.
10 ms Max.
0.2 ps Typ.
3 ps Typ.
3 ps Typ.
25 ps Typ.
4 ps Typ.
1 ps Max.
-6
-6
fo
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
L_CMOS
V
IH
V
IL
t
r
/
t
f
t_str
EG-2001CA
106.250 MHz to
170.000 MHz
3.3 V 0.3 V
0
C
to +70 C
Z:
50
10
-6
Y,H:
100 
10
-6
50 mA Max.
10
A
Max.
45 % to 55 %
V
CC
-0.4 V Min.
0.4 V Max.
Conditions / Remarks
Please contact us about available frequencies.
Storage as single product.
OE=Vcc, No load condition
OE=GND
50 % V
CC
level, L_CMOS Max.
I
OH
= -8 mA
I
OL
= 8 mA
OE terminal
Between 20% V
CC and
80% V
CC
level, L_CMOS Max.
Time at minimum supply voltage to be 0 s
Deterministic Jitter
Random Jitter
(RMS of total distribution)
Peak to Peak
Accumulated Jitter() n=2 to 50000 cycles
Offset frequency: 12 kHz to 20 MHz
Jitter *2
Phase Jitter
t
RMS
t
p-p
t
acc
t
PJ
t
DJ
t
RJ
Frequency aging *3
f_aging
10
10 / year Max.
5
10 / year Max. +25
C,
First year, V
CC
=2.5 V,3.3 V
*1 As per table below
*2 Tested using a DTS-2075 Digital timing system made by WAVECREST with jitter analysis software VISI6.
*3 Except: CHPA,CHRA,PCH
Model
EG-2021CA
Model
Aging
A *4
N *5
Symmetry
H:
10010
-6
(0C to +70C) *4
HP:
10010
-6
(0C to +70C)
CHPA
CHPN
-6
CHRA
CHRN
Frequency tolerance and Y:
10010
-6
(0C to +70C) *5
Frequency tolerance and HR:
10010
(-5C to +85C)
-6
operating temperature
operating temperature
GP:
5010
(0C to +70C)
-
CGPN
Z:
5010
-6
(0C to +70C) *6
GR:
5010
-6
(-5C to +85C)
-
CGRN
*4 This includes initial frequency tolerance, temperature variation, supply voltage variation, load variation, reflow drift, and aging(+25
C,10
years).
*5 This includes initial frequency tolerance, temperature variation, supply voltage variation, load variation, and reflow drift.(except aging)
*6 This includes initial frequency tolerance, and temperature variation.(except reflow drift, supply voltage variation, load variation and aging)
EG-2001CA
P: 50
5
%
PCH
PCY
PCZ
External dimensions
EG-2021CA
#4
#3
5.0±0.2
#3
1.4
1.1
#4
(Unit:mm)
EG-2001CA
1.4
#3
5.0±0.2
#4
1.1
Footprint (Recommended) (Unit:mm)
1.8
1.5
3.9
5.08
To maintain stable operation,
provide a 0.01uF to 0.1uF
by-pass capacitor at a location as
near as possible to the power
source terminal of the crystal
product (between Vcc - GND).
E EG-2021
125.000C
HPA172A
#1
#2
7.0
±
0.2
2.6
E 125.000H
1PC124A
#2
5.08
Pin map
Pin. Connection
OE
*1
1
2
GND
3
OUT
4
V
CC
#1
7.0±0.2
1.2
±0.2
#2
5.08
Pin map
Pin
Connection
OE
*1
1
2
GND
3
OUT
4
V
CC
#1
1.2±0.2
5.08
5.08
*1 Standby function built-in
#2 is connected to the cover.
*1 Standby function built-in
#2 is connected to the cover.
OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance
2.6