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E0C6SB27F 参数 Datasheet PDF下载

E0C6SB27F图片预览
型号: E0C6SB27F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.08MHz, MICROCONTROLLER, PQFP60, PLASTIC, QFP6-60]
分类和应用: 时钟外围集成电路
文件页数/大小: 11 页 / 106 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C6S27
E0C6SA27 (CR, Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=200kHz, R
CR
=160kΩ, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C1–C5=0.1µF)
Unit
Min.
Typ.
Characteristic
Symbol
Condition
Max.
1
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
1
V
—•V
L2
-0.1
—•V
L2
×0.9
(without panel load)
2
2
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
V
-2.10
-1.95
-2.25
(without panel load)
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
3
3
V
—•V
L2
×0.9
—•V
L2
-0.1
(without panel load)
2
2
V
V
SVD
-2.40
-2.25
SVD voltage
-2.55
µS
t
SVD
100
SVD circuit response time
µA
I
OP
During HALT
60
110
Current consumption
Without panel load
1
µA
During execution
*
70
130
∗1:
The SVD circuit is turned off.
E0C6SA27 (CR, Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=200kHz, R
CR
=160kΩ, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C1–C5=0.1µF)
Unit
Min.
Typ.
Characteristic
Symbol
Condition
Max.
1
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
1
V
—•V
L2
-0.1
—•V
L2
×0.85
(without panel load)
2
2
Connect 1MΩ load resistor between V
DD
and V
L2
V
L2
V
-2.10
-1.95
-2.25
(without panel load)
3
3
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
V
—•V
L2
×0.85
—•V
L2
-0.1
(without panel load)
2
2
V
V
SVD
-2.40
-2.25
SVD voltage
-2.55
t
SVD
µS
100
SVD circuit response time
µA
During HALT
85
160
Current consumption
I
OP
Without panel load
µA
During execution
*
1
95
180
∗1:
The SVD circuit is turned off.
E0C6SB27 (CR, Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, R
CR
=470kΩ, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C1–C5=0.1µF)
Unit
Characteristic
Symbol
Min.
Typ.
Condition
Max.
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
V
-1.15
-1.05
-0.95
(without panel load)
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
V
2•V
L1
-0.1
2•V
L1
×0.9
(without panel load)
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
V
3•V
L1
-0.1
3•V
L1
×0.9
(without panel load)
V
V
SVD
SVD voltage
-1.30
-1.20
-1.10
µS
t
SVD
SVD circuit response time
100
µA
I
OP
During HALT
Current consumption
6.5
14.0
Without panel load
µA
During execution
*
1
9.0
18.0
∗1:
The SVD circuit is turned off.
E0C6SB27 (CR, Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=65kHz, R
CR
=470kΩ, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage, C1–C5=0.1µF)
Min.
Typ.
Unit
Characteristic
Symbol
Condition
Max.
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
-1.15
-1.05
V
-0.95
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
V
L2
2•V
L1
-0.1
V
2•V
L1
×0.85
(without panel load)
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
V
3•V
L1
-0.1
3•V
L1
×0.85
(without panel load)
V
SVD
-1.20
-1.10
V
SVD voltage
-1.30
t
SVD
100
µS
SVD circuit response time
15.0
35.0
µA
During HALT
Current consumption
I
OP
Without panel load
1
18.0
40.0
µA
During execution
*
∗1:
The SVD circuit is turned off.
8