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E0C62M2D 参数 Datasheet PDF下载

E0C62M2D图片预览
型号: E0C62M2D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.32768MHz, MICROCONTROLLER, UUC, DIE]
分类和应用: 时钟外围集成电路
文件页数/大小: 6 页 / 79 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C62M2
s
ELECTRICAL CHARACTERISTICS
q
Absolute Maximum Ratings
(V
DD
/V
DDA
=0V)
Rating
Symbol
Value
Unit
V
DD
/V
DDA
0
V
Supply voltage
V
SSD
/V
SSA
-3.5
V
V
SS2
-7.0
V
V
SSD
system V
I1
(V
SSD
/V
SSA
- 0.3) to (V
DD
/V
DDA
+ 0.3)
V
Input voltage
V
SS2
system V
I2
(V
SS2
- 0.3) to (V
DD
/V
DDA
+ 0.3)
V
10
mA
Permissible total output current
1
ΣI
Operating temperature (1)
-20 to 70
Topr
1
°C
Topr
2
Operating temperature (2)
2
0 to 40
°C
Storage temperature
Tstg
-65 to 150
°C
Soldering temperature / Time
Tsol
260°C, 10sec (lead section)
3
Permissible dissipation
P
D
250
mW
∗1:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is drawn in).
∗2:
The A/D converter is ON status.
∗3:
In case of plastic package (QFP5-80pin, QFP14-80pin).
q
Recommended Operating Conditions
Condition
Supply voltage
Oscillation frequency
Measurement system
operating temperature
Symbol
Remark
V
SSD
/V
SSA
V
DD
/V
DDA
=0V
f
OSC1
Tmes
During measurement by the A/D converter
Min.
-3.5
15
Typ.
-3.0
32.768
25
Max.
-2.15
35
Unit
V
kHz
°C
q
DC Characteristics
(Unless otherwise specified: V
DD
/V
DDA
=0V, V
SSD
/V
SSA
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, V
L1
–V
L3
are internal voltage)
Characteristic
Symbol
Condition
Unit
Typ.
Max.
Min.
V
DD
High level input voltage (1)
V
K00–K03, K10–K13
0.1•V
SSD
V
IH1
RESET, TEST
High level input voltage (2)
V
V
IH2
P00–P03
0.1•V
SSD
V
DD
Low level input voltage (1)
V
K00–K03, K10–K13
V
IL1
V
SSD
0.9•V
SSD
RESET, TEST
Low level input voltage (2)
V
V
IL2
V
SSD
0.9•V
SSD
P00–P03
High level input current (1)
V
IH1
=V
DD
, V
SSD
=-3.0V
µA
I
IH1
K00–K03, K10–K13
0
0.5
Without pull down resistor
P00–P03, RESET, TEST
10
High level input current (2)
µA
V
IH2
=V
DD
, V
SSD
=-3.0V
K00–K03, K10–K13
5
20
I
IH2
P00–P03, RESET, TEST
With pull down resistor
Low level input current
µA
K00–K03, K10–K13
-0.5
0
V
IL
=V
SSD
=-3.0V
I
IL
P00–P03, RESET, TEST
mA
R00–R03, P00–P03
-0.9
V
OH1
=0.1•V
SSD
, V
SSD
=-3.0V
High level output current (1)
I
OH1
mA
BZ, BZ
-1.2
I
OH2
High level output current (2)
V
OH2
=0.1•V
SSD
, V
SSD
=-3.0V
mA
R00–R03, P00–P03
3.0
V
OL1
=0.9•V
SSD
, V
SSD
=-3.0V
I
OL1
Low level output current (1)
mA
BZ, BZ
3.5
V
OL2
=0.9•V
SSD
, V
SSD
=-3.0V
I
OL2
Low level output current (2)
µA
COM0–COM3
-3.0
V
OH3
=V
DD
-0.05V
Common output current
I
OH3
µA
3.0
V
OL3
=V
L3
+0.05V
I
OL3
µA
SEG0–SEG15
-3.0
Segment output current
V
OH4
=V
DD
-0.05V
I
OH4
µA
3.0
(during LCD output)
V
OL4
=V
L3
+0.05V
I
OL4
mA
SEG0–SEG15
50
Segment output current
V
OH5
=0.1•V
SSD
I
OH5
mA
-70
(during DC output)
I
OL5
V
OL5
=0.9•V
SSD
4