E0C6005
s
BLOCK DIAGRAM
ROM
1,536 words x 12 bits
OSC
System Reset
Control
Core CPU E0C6200B
RAM
80 words x 4 bits
COM0–3
SEG0–19
V
DD
V
L1–3
CA–CB
V
S1
V
SS
ADOUT
RS
TH1
TH2
CS
Interrupt
Generator
Input Port
Test Port
K00–03
TEST
P00–03
LCD Driver
Power
Controller
I/O Port
Output Port
RESET
OSC2
OSC1
R00–03
A/D Converter
Timer
s
PIN CONFIGURATION
QFP6-60pin
45
31
46
30
E0C6005
INDEX
60
16
Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name
1
N.C.
16 N.C.
31 TEST
46 V
L3
2
N.C.
17 ADOUT
32 RESET
47 V
L2
3
K00
18 SEG0
33 SEG12
48 V
L1
4
K01
19 SEG1
34 SEG13
49 CA
5
K02
20 SEG2
35 SEG14
50 CB
6
K03
21 SEG3
36 SEG15
51 V
SS
7
R00
22 SEG4
37 SEG16
52 V
DD
8
R01
23 SEG5
38 SEG17
53 OSC1
9
R02
24 SEG6
39 SEG18
54 OSC2
10 R03
25 SEG7
40 SEG19
55 V
S1
11 RS
26 SEG8
41 COM0
56 P00
12 TH1
27 SEG9
42 COM1
57 P01
13
14
15
TH2
CS
N.C.
28
29
30
SEG10
SEG11
N.C.
43
44
45
COM2
COM3
N.C.
P03
N.C.
N.C. : No Connection
58
59
60
P02
1
15
2