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SC206KSIT 参数 Datasheet PDF下载

SC206KSIT图片预览
型号: SC206KSIT
PDF下载: 下载PDF文件 查看货源
内容描述: 120 kHz带宽,高电压隔离电流传感器,集成了过流检测 [120 kHz Bandwidth, High Voltage Isolation Current Sensor with Integrated Overcurrent Detection]
分类和应用: 传感器
文件页数/大小: 13 页 / 1780 K
品牌: SECELECTRONICS [ SEC Electronics Inc. ]
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SC206KSIT  
120 kHz Bandwidth, High Voltage Isolation  
Current Sensor with Integrated Overcurrent Detection  
starts discharging.  
2. When the  
pin voltage reaches approximately 2 V, the fault is latched, and an internal  
FAULT  
NMOS device pulls the  
pin voltage to approximately 0 V. The rate at which the  
FAULT  
pin slews downward (see [4] in the figure) is dependent on the external capacitor, C ,  
FAULT  
on the  
OC  
pin.  
FAULT  
3. When the FAULT_EN pin is brought low, the  
pin starts resetting if no OC fault  
FAULT  
condition exists, and if FAULT_EN is low for a time period greater than tOCH. The internal  
NMOS pull-down turns off and an internal PMOS pullup turns on (see [7] if the OC fault  
condition still exists).  
4. The slope, and thus the delay to latch the fault is controlled by the capacitor, COC, placed on the  
pin to ground. During this portion of the fault (when the  
pin is between VCC and  
FAULT  
FAULT  
2 V), there is a 3 mA constant current sink, which discharges COC. The length of the fault delay, t  
is equal to:  
COC ×(VCC 2V )  
t =  
3mA  
where VCC is the device power supply voltage in volts, t is in seconds and COC is in Farads. This  
formula is valid for RPU equal to or greater than 330 kΩ. For lower-value resistors, the current  
flowing through the RPU resistor during a fault event, IPU , will be larger. Therefore, the current  
discharging the capacitor would be 3 mA – IPU and equation 1 may not be valid.  
5. The  
pin did not reach the 2 V latch point before the OC fault condition cleared. Because  
FAULT  
of this, the fixed 3 mA current sink turns off, and the internal PMOS pull-up turns on to recharge  
COC through the pin.  
FAULT  
6. This curve shows VCC charging external capacitor COC through the internal PMOS pull-up. The  
slope is determined by COC.  
7. When the FAULT_EN pin is brought low, if the fault condition still exists, the latched  
FAULT  
pin will be pulled low by the internal 3mA current source. When fault condition is removed then  
the Fault pin charges as shown in step 6.  
8. At this point there is a fault condition, and the part is enabled before the  
pin can charge to  
FAULT  
VCC. This shortens the user-set delay, so the fault is latched earlier. The new delay time can be  
calculated by equation 1, after substituting the voltage seen on the  
pin for V .  
FAULT  
CC  
1
1
1
Vcc  
4
6
4
4
8
5
6
4
2
2
2
6
2V  
0V  
7
3
Fault_En  
Input  
OC Fault Condition  
(Active High)  
12/13  
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