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2SK3332 参数 Datasheet PDF下载

2SK3332图片预览
型号: 2SK3332
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Field-Effect Transistor, 12A I(D), 150V, 0.23ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220F, FM20, 3 PIN]
分类和应用: 局域网
文件页数/大小: 58 页 / 737 K
品牌: SANKEN [ SANKEN ELECTRIC ]
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Sanken MOS FETs feature guaranteed  
avalanche energy capability.  
Avalanche energy capability of MOS FET  
1. What is avalanche energy capability ?  
3. Temperature derating for EAS  
When a MOS FET is used for high-speed switching, the  
inductive load and wiring inductance may cause a counter  
electromotive voltage at cutoff that the device cannot  
withstand.  
The EAS Value in the specifications is guaranteed when  
the channel temperature Tch is 25ºC. Since the EAS Value  
drops as the channel temperature rises, derating  
depending on the temperature is necessary.  
Avalanche energy capability is the non-clamped ability  
to withstand damage expressed as energy. As long as the  
energy applied to the device at cutoff is within the  
guaranteed avalanche energy capability, the device will not  
be damaged even if the Drain-Source voltage exceeds the  
capability.  
Fig.B shows the derating curve for single avalanche  
energy capability. This is the derating curve of EAS and the  
channel temperature (Tch (start)) immediately before the  
avalanche occurs in the product, with the EAS value  
(maximum rating) at 25ºC as 100% .  
For example, if the product temperature is 50ºC, the EAS  
value is derated to 64% of the value at 25ºC.  
For example, a Drain-Source voltage that is within the  
guaranteed capability when electrically stationary may  
exceed the limit at startup or cutoff. Usually, a snubber  
circuit or similar surge absorbing circuit is used to keep the  
Drain-Source voltage within the guaranteed capability.  
Sanken MOS FETs, however, do not require this kind of  
protective circuit because the avalanche energy capability  
is guaranteed. Sanken MOS FETs enable the number of  
parts to be reduced, saving board area.  
Fig. B  
EAS Tch (start)  
ILp = ID max  
100  
80  
60  
40  
* Consult the engineering department of Sanken when  
planning to use MOS FETs in avalanche mode.  
20  
0
2. EAS calculation method  
If the current in an inductive load L is ILP at the moment  
when the MOS FET is cut off, EAS can be expressed as  
follows:  
25  
50  
75  
100  
125  
150  
Tch (start) (ºC)  
VDSS  
VDSS VDD  
1
2
...........................  
2
EAS  
=
L ILp •  
1
4. Continuous avalanche energy capability  
* VDD: Supply voltage  
If the value of L is not known in an actual circuit, EAS  
can also be calculated from the actual voltage and current  
This section explains the derating method for continu-  
ous avalanche.  
waveforms as follows:  
Considering continuous avalanche as the repetition of a  
single avalanche, the safe operating area (SOA) is deter-  
mined using the derating curve shown in Fig. B.  
Calculate the energy and Tch (start) of avalanche in the  
worst condition and determine SOA using the calculated  
data and the derating curve shown in Fig.B. The tempera-  
ture rise due to avalanche should not cause the channel  
temperature to exceed the maximum rating.  
............................................................  
2
EAS = Ps t  
* Ps: Surge power * t: Surge time  
The following calculation is used to determine EAS  
where the voltage and current shown in Fig.A are applied  
to the MOS FET in a circuit.  
Integrate the overlapping section of ID and VDS to calcu-  
late IDVDSdt. When the ID waveform is triangular, EAS  
will be as follows:  
1
The following is an example of determining SOA judg-  
ment by calculation when a MOS FET enters a transient  
avalanche state at power-on then changes to a stationary  
state.  
EAS  
=
10(A) 550(V) 10(µs) = 27.5 (mJ)  
2
Fig. A  
10A  
Supposing that the waveform is as shown in Fig.C until  
the MOS FET changes to the stationary state, calculate the  
start loss and switching (turn-on/off) Ioss. To simplify the  
calculation, the average loss Pa and the last two wave-  
forms are used for approximation. (Fig. D)  
ID  
0
550V  
(VDSS  
First, calculate the channel temperature Tch ( ) at time  
( ) where the temperature condition is severest.  
If the Tch ( ) value is within the maximum rating, there  
is no problem as far as the temperature is concerned.  
)
VDS  
0
10µs  
4