S6A0079
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
TEST1 OSC1 OSC2
Power on Reset
(POR)
RESET
TEST2
RS
E
RW
System
Interface
4-bit
8-bit
8
Instruction
Register
(IR)
Oscillator
Timing Generator
Instruction
Decoder
7
COM0-
Common COM33
Driver
Address
Counter
7
7
Display Data
RAM (DDRAM)
96 x 8-bit
34-bit
Shift
Register
8
8
DB4-DB7
Input/
Output
Buffer
Busy Flag
LCD Driver
Voltage Selector
Data
Register
(DR)
8
SEG1-
120-bit
Segment SEG120
Latch
Driver
Circuit
120-bit
Shift
Register
DB3-DB1
DB0
7
8
8
Vci
C1
Voltage Converter
C2
Character
Generator
RAM
(CGRAM)
64 bytes
5
Character
Generator
ROM
(CGROM)
9600 bits
5
Cursor and
Blink
Controller
V1 - V5
V5OUT2
V5OUT3
Parallel/Serial Converter and
Smooth Scroll Circuit
VDD
GND(VSS)
2
SAMSUNG [ SAMSUNG SEMICONDUCTOR ]
