CMOS SRAM
KM684000B Family
512Kx8 bit Low Power CMOS Static RAM
FEATURES
GENERAL DESCRIPTION
· Process Technology: TFT
The KM684000B families are fabricated by SAMSUNG¢s
advanced CMOS process technology. The families support
various operating temperature ranges and various package
types for user flexibility of system design. The family also
support low data retention voltage for battery back-up oper-
ation with low data retention current.
· Organization: 512Kx8
· Power Supply Voltage: 4.5~5.5V
· Low Data Retention Voltage: 2V(Min)
· Three state output and TTL Compatible
· Package Type: 32-DIP-600, 32-SOP-525
32-TSOP2-400F/R
PRODUCT FAMILY
Power Dissipation
Product Family
Operating Temperature
Vcc Range
Speed
PKG Type
Standby
(ISB1, Max)
Operating
(ICC2, Max)
KM684000BL
KM684000BL-L
KM684000BLI
KM684000BLI-L
100mA
20mA
32-DIP,32-SOP
32-TSOP2-F/R
Commercial (0~70°C)
Inderstrial (-40~85°C)
551)/70ns
4.5~5.5V
80mA
100mA
50mA
32-SOP
32-TSOP2-F/R
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
A18
A16
A14
A12
A7
VCC
A15
A17
WE
A13
A8
VCC
A15
A17
1
Clk gen.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
A18
Precharge circuit.
2
2
3
A16
A14
A12
A7
3
A18
A16
A14
A12
A7
4
WE
A13
A8
4
5
5
Memory array
1024 rows
512´ 8 columns
6
A6
6
A6
Row
select
32-DIP
32-SOP
32-TSOP2
A5
7
A9
A9
7
A5
A6
32-TSOP2
(Reverse)
A11
OE
A4
8
A11
OE
8
A4
A5
A4
A3
9
9
A3
(Forward)
A1
A10
CS
A2
10
11
12
13
14
15
16
A10
CS
10
11
12
13
14
15
16
A2
A0
A1
A1
I/O8
I/O7
I/O6
I/O5
I/O4
I/O8
I/O7
I/O6
I/O5
I/O4
A0
A0
I/O1
I/O8
Data
cont
I/O Circuit
I/O1
I/O2
I/O3
VSS
I/O1
I/O2
I/O3
VSS
Column select
Data
cont
A9 A8 A13A17 A15 A10 A11 A3 A2
Pin Name
WE
Function
Write Enable Input
Chip Select Input
Output Enable Input
Address Inputs
Data Inputs/Outputs
Power
CS
CS
WE
OE
Control
logic
OE
A0~A18
I/O1~I/O8
Vcc
Vss
Ground
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
Revision 3.0
September 1998
2