OneNAND512Mb(KFG1216U2B-xIB6)
FLASH MEMORY
2.7.2 Internal Memory Spare Area Assignment
The figure below shows the assignment of the spare area in the Internal Memory NAND Array.
Spare Spare Spare Spare
Main area Main area Main area Main area area area area area
256W 256W 256W 256W 8W 8W 8W 8W
ECCm ECCm ECCm ECCs ECCs
Note1 Note1 Note2 Note2 Note2 Note3 Note3 Note3
Note3 Note4 Note4
1st
2nd
3rd
1st
2nd
LSB
MSB
LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB
1st
W
2nd
W
3rd W
4th W
5th W
6th W
7th W
8th W
Spare Area Assignment in the Internal Memory NAND Array Information
Word
Byte
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
Note
Description
1
1
Invalid Block information in 1st and 2nd page of an invalid block
2
3
4
2
3
Managed by internal ECC logic for Logical Sector Number data
Reserved for future use
Dedicated to internal ECC logic. Read Only.
ECCm 1st for main area data
LSB
MSB
LSB
MSB
LSB
5
6
Dedicated to internal ECC logic. Read Only.
ECCm 2nd for main area data
Dedicated to internal ECC logic. Read Only.
ECCm 3rd for main area data
Dedicated to internal ECC logic. Read Only.
ECCs 1st for 2nd word of spare area data
Dedicated to internal ECC logic. Read Only.
ECCs 2nd for 3rd word of spare area data
7
8
MSB
LSB
MSB
3
4
Reserved for future use
Available to the user (note 5)
Note 5 : For all blocks, 8th word is available to the user.
However,in case of OTP Block, 8th word of sector 0, page 0 is reserved as OTP Locking Bit area.
Therefore, in case of OTP Block, user usage on this area is prohibited.
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SAMSUNG [ SAMSUNG ]
