K4E660411D, K4E640411D
CMOS DRAM
16M x 4bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 16,777,216 x 4 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time ( -50, or -60), package type (SOJ or TSOP-
II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
This 16Mx4 EDO Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power
consumption and high reliability.
FEATURES
• Part Identification
- K4E660411D-JC(5.0V, 8K Ref., SOJ)
- K4E640411D-JC(5.0V, 4K Ref., SOJ)
- K4E660411D-TC(5.0V, 8K Ref., TSOP)
- K4E640411D-TC(5.0V, 4K Ref., TSOP)
• Extended Data Out Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Fast parallel test mode capability
• TTL(5.0V) compatible inputs and outputs
• Early Write or output enable controlled write
•
Active Power Dissipation
Unit : mW
Speed
-50
-60
8K
495
440
4K
660
605
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• +5.0V±10% power supply
•
Refresh Cycles
Part
NO.
K4E660411D*
K4E640411D
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
RAS
CAS
W
FUNCTIONAL BLOCK DIAGRAM
Control
Clocks
Vcc
Vss
VBB Generator
Refresh Control
Refresh Counter
Memory Array
16,777,216 x 4
Cells
Sense Amps & I/O
* Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Refresh Timer
Row Decoder
Data in
Buffer
DQ0
to
DQ3
Data out
Buffer
OE
•
Performance Range
Speed
-50
-60
t
RAC
50ns
60ns
t
CAC
13ns
15ns
t
RC
84ns
104ns
t
PC
20ns
25ns
A0~A12
(A0~A11)*1
A0~A10
(A0~A11)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.