Rev. 1.01
K4B2G0446D
K4B2G0846D
datasheet
DDR3L SDRAM
I
I
DDQ
DD
V
V
DDQ
DD
RESET
CK/CK
CKE
CS
RAS, CAS, WE
DQS, DQS
DQ, DM,
TDQS, TDQS
R
= 25 Ohm
V
TT
/2
DDQ
A, BA
ODT
ZQ
V
V
SSQ
SS
[NOTE : DIMM level Output test load condition may be different from above]
Figure 19. Measurement Setup and Test Load for IDD and IDDQ Measurements
Application specific
memory channel
environment
IDDQ
Test Load
Channel
IO Power
Simulation
IDDQ
Measurement
IDDQ
Simulation
Correlation
Correction
Channel IO Power
Number
Figure 20. Correlation from simulated Channel IO Power to actual Channel IO Power supported by IDDQ Measurement.
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SAMSUNG [ SAMSUNG ]
