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K4B2G0846D-HYH9 参数 Datasheet PDF下载

K4B2G0846D-HYH9图片预览
型号: K4B2G0846D-HYH9
PDF下载: 下载PDF文件 查看货源
内容描述: 2GB D-死DDR3L SDRAM [2Gb D-die DDR3L SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 64 页 / 1744 K
品牌: SAMSUNG [ SAMSUNG ]
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Rev. 1.01  
K4B2G0446D  
K4B2G0846D  
datasheet  
DDR3L SDRAM  
8.5 Slew rate definition for Differential Input Signals  
See 14.3 “Address/Command Setup, Hold and Derating :” on page 50 for single-ended slew rate definitions for address and command signals.  
See 14.4 “Data Setup, Hold and Slew Rate Derating :” on page 56 for single-ended slew rate definitions for data signals.  
8.6 Slew rate definitions for Differential Input Signals  
Input slew rate for differential signals (CK, CK and DQS, DQS) are defined and measured as shown in Table 15 and Figure 5.  
[ Table 15 ] Differential input slew rate definition  
Measured  
Description  
Defined by  
From  
To  
VIHdiffmin - VILdiffmax  
Delta TRdiff  
VILdiffmax  
VIHdiffmin  
Differential input slew rate for rising edge (CK-CK and DQS-DQS)  
VIHdiffmin - VILdiffmax  
VIHdiffmin  
VILdiffmax  
Differential input slew rate for falling edge (CK-CK and DQS-DQS)  
Delta TFdiff  
NOTE :  
The differential signal (i.e. CK - CK and DQS - DQS) must be linear between these thresholds.  
V
IHdiffmin  
ILdiffmax  
0
V
delta TFdiff  
delta TRdiff  
Figure 5. Differential Input Slew Rate definition for DQS, DQS, and CK, CK  
9. AC & DC Output Measurement Levels  
9.1 Single-ended AC & DC Output Levels  
[ Table 16 ] Single-ended AC & DC output levels  
Symbol  
Parameter  
DDR3-800/1066/1333/1600  
Units  
NOTE  
VOH(DC)  
DC output high measurement level (for IV curve linearity)  
0.8 x VDDQ  
0.5 x VDDQ  
V
V
OM(DC)  
VOL(DC)  
OH(AC)  
OL(AC)  
DC output mid measurement level (for IV curve linearity)  
DC output low measurement level (for IV curve linearity)  
AC output high measurement level (for output SR)  
AC output low measurement level (for output SR)  
V
V
V
V
0.2 x VDDQ  
V
VTT + 0.1 x VDDQ  
VTT - 0.1 x VDDQ  
1
1
V
NOTE : 1. The swing of +/-0.1 x V  
is based on approximately 50% of the static single ended output high or low swing with a driver impedance of 40and an effective test  
DDQ  
DDQ  
load of 25to V =V  
/2.  
TT  
9.2 Differential AC & DC Output Levels  
[ Table 17 ] Differential AC & DC output levels  
Symbol  
Parameter  
DDR3-800/1066/1333/1600  
Units  
NOTE  
VOHdiff(AC)  
AC differential output high measurement level (for output SR)  
+0.2 x VDDQ  
V
1
VOLdiff(AC)  
AC differential output low measurement level (for output SR)  
-0.2 x VDDQ  
V
1
NOTE : 1. The swing of +/-0.2xV  
is based on approximately 50% of the static single ended output high or low swing with a driver impedance of 40and an effective test  
DDQ  
DDQ  
load of 25to V =V  
/2 at each of the differential outputs.  
TT  
- 19 -  
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