Rev. 1.01
K4B2G0446D
K4B2G0846D
datasheet
DDR3L SDRAM
8.4 Differential Input Cross Point Voltage
To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each cross point voltage of differential input
signals (CK, CK and DQS, DQS) must meet the requirements in below table. The differential input cross point voltage VIX is measured from the actual
cross point of true and complement signal to the mid level between of VDD and VSS
.
VDD
CK, DQS
VIX
VDD/2
VIX
VIX
CK, DQS
VSS
Figure 4. VIX Definition
[ Table 13 ] Cross point voltage for differential input signals (CK, DQS) : 1.35V
DDR3L-800/1066/1333/1600
Symbol
Parameter
Unit
NOTE
Min
-150
-150
Max
150
150
VIX
VIX
Differential Input Cross Point Voltage relative to VDD/2 for CK,CK
Differential Input Cross Point Voltage relative to VDD/2 for DQS,DQS
mV
mV
1
NOTE :
1. The relationbetween Vix Min/Max and VSEL/VSEH should satisfy following.
(VDD/2) + Vix(Min) - VSEL ≥ 25mV
VSEH - ((VDD/2) + Vix(Max)) ≥ 25mV
[ Table 14 ] Cross point voltage for differential input signals (CK, DQS) : 1.5V
DDR3-800/1066/1333/1600
Symbol
Parameter
Unit
NOTE
Min
-150
-175
-150
Max
150
175
150
mV
mV
mV
VIX
VIX
Differential Input Cross Point Voltage relative to VDD/2 for CK,CK
Differential Input Cross Point Voltage relative to VDD/2 for DQS,DQS
1
NOTE :
1. Extended range for V is only allowed for clock and if single-ended clock input signals CK and CK are monotonic, have a single-ended swing V
/ V
of at least V /2
IX
SEL
SEH DD
±250 mV, and the differential slew rate of CK-CK is larger than 3 V/ ns.
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