BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
CORE PIN DESCRIPTION
Name
VDDA1
VSSA1
VDDA2
VSSA2
VBB
I/O Type
I/O Pad
vdda
Pin Description
5 V Analog Supply
AP
AG
AP
AG
AG
DP
DG
AB
AB
AB
AB
AI
vssa
Analog Ground
vdda
5 V Analog Supply(for ADC)
Analog Ground(for ADC)
Substarte Ground
vssa
vbba
VDDD
vddd
5 V Digital Supply
VSSD
vssd
Digital Ground
REFT
piar50_bb
piar50_bb
piar50_bb
piar50_bb
piar10_bb
piar10_bb
piar10_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
pia_bb
Reference Decoupling
Reference Decoupling
Analog Common Voltage
Bandgap Refernce Voltage
Analog Input; Red
REFB
VCOM
BGR
R_VIN
G_VIN
AI
Analog Input; Green
B_VIN
AI
Analog Input; Blue
STRTLN
CDS1_CLK
CDS2_CLK
ADCCLK
CSB
DI
STRTLN indicates beginning of line
CDS Reset Clock Pulse Input
CDS Data Clock Pulse Input
A/D Converter Sample Clock Input
Chip Select; Active Low
Write Strobe; Active Low
Read Strobe; Active Low
Output Enable; Active Low
Data Inputs/Outputs
DI
DI
DI
DI
WRB
DI
RDB
DI
OEB
DI
D[11:0]/MPU[7:0]
AD[2:0]
MCTL1, MCTL2
EXT_MCTL
DB
DI
picc_bb
picc_bb
picc_bb
Register Select
DI
Channel Select in External MUX Control
External MUX Control; Active Low
DI
I/O TYPE ABBR.
·
·
·
·
·
AI : Analog Input
AO : Analog Output
AP : Analog Power
DP : Digital Power
· DI : Digital Input
· DO : Analog Output
· AG : Analog Ground
· DG : Digital Ground
AB : Analog Bidirectional Port · DB : Digital Bidirectional Port
3
SAMSUNG [ SAMSUNG ]
