SA9401
39 38 37 36 35 34 33 32 31 30 29
40
41
42
43
44
1
28
TEST
FS1
A8
A9
A11
GND
A10
A12
A13
PS2
CLK_SEL
A0
A1
A2
A3
GND
A4
A5
A6
PCMFSC
CLKIN
27
26
25
24
23
22
21
20
SA9401
2
3
4
5
6
19
18
WD_INT
7
8
9
10 11 12 13 14 15 16 17
DR-00603
Package : PLCC - 44
PIN DESCRIPTION
Pin No
I/0 Designation
Description
1, 23
I
I
I
I
GND
Supply Ground
12, 34
27
VCC
+5V Power Supply
FS1
Frame Synchronisation (active low)
6
CLKIN
Master clock input (either 8192kHz or 2048 Khz
dependent on logic level of "CLK _SEL")
8
O
O
O
O
O
O
O
2MCLK
8KFS
2048 kHz clock derived internally from CLKIN
8 kHz Frame Synchronisation output.
8 kHz Auxilliary Frame Synchronisation Output
Square Wave Intrude Tone
10
5
11
PCMFSC
INTRFRQ
INTRCAD
PCM_OUT
A0..A13
13
Intrude Tone Cadence Signal
15
Tri-state PCM Highway tone output
EPROM Address Lines
41, 42, 43, 44,
2, 3, 4, 39, 26,
25, 22, 24,
21, 20
2
sa me s
SAMES [ SAMES ]
