SA8807A
Diagram 2: LCD Driving Signals
4. LCD Character Mapping
The device contains 12 x 8 bit display memory. Each byte is divided into 2 x 4 bits,
for driving two adjacent segment outputs.
The lower four bits (3, 2, 1 & 0) contain the data for segments VS[0], VS[2], ......
VS[20] and VS[22]. The upper four bits (7, 6, 5 & 4) contain the data segments
VS[1], VS[3], ...... VS[21] and VS[23].
SEG VS[0] VS[1] VS[2] VS[3]
........ VS[20] VS[21] VS[22] VS[23]
VR[0]
VR[1]
VR[2]
VR[3]
0-0
0-1
0-2
0-3
0-4*
0-5
0-6
0-7
1-0
1-1
1-2
1-3
1-4
1-5
1-6
1-7
........
........
........
........
10-0
10-1
10-2
10-3
10-4 11-0 11-4
10-5 11-1 11-5
10-6 11-2 11-6
10-7 11-3 11-7
Note: A '1' switches the corresponding segment on.
* The address number and bit number of the byte is given, e.g. 0-4 is address 0 and
bit 4 (LSB).
In 3-backplane mode, data corresponsing to VR[3] (bit 3 and 7) is unused.
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sames
SAMES [ SAMES ]
