SA8806A
3.
LCD Character Mapping
The device has 16 address locations, A0 - A15 which correspond to VS[0] - VS[15].
Each location contains 4 bits, D[3] to D[0] which correspond to VR[3] - VR[0].
The mapping is detailed in the table below:
SEG
VR[0]
VR[1]
VR[2]
VR[3]
VS[0] VS[1] VS[2] VS[3]
0-0
0-1
0-2
0-3
1-0*
1-1
1-2
1-3
2-0
2-1
2-2
2-3
3-0
3-1
3-2
3-3
........
........
........
........
........
VS[12] VS[13] VS[14] VS[15]
12-0
12-1
12-2
12-3
13-0
13-1
13-2
13-3
14-0
14-1
14-2
14-3
15-0
15-1
15-2
15-3
Note: A '1' switches the corresponding segment on.
* The address number and bit number of the byte is given, e.g. 1-0 is address 1 and
bit 0 (LSB).
4.
On-Chip LCD Voltage Divider Disable
The integrated divider for the LCD voltages can be disabled by applying a high level
on the EN input (EN = 1).
Contrast Setting
The contrast may be adjusted in two ways:
An external resistor divider supplying the LCD voltage inputs VI1, VI1/3, VI2/3, with
the internal divider disabled as described in paragraph 4.
Applying an external LCD voltage on input V1, with the internal voltage divider
activated.
6.
Oscillator
The on-chip oscillator circuit requires one external capacitor for operation. The
capacitor value is calculated as follows:
C = 7µF.1Hz/f
f = Required oscillator frequency
The multiplex rate is 64 times lower than the clock frequency.
TYPICAL APPLICATION
The Application Circuit (Figure 1) shows the connections for a typical application utilising
an 8 digit (7 segment) display, plus decimal points.
5.
8/10
sames
SAMES [ SAMES ]
