BM28723AMUV
Description of Function – continued
19 Auto Recovery of Clock Error Function
Establishment of Clock stop detection flag or BCLK high speed detection flag or BCLK low speed detection flag makes PWM
output mute (Immediate mute).
In that case, if the Auto Recovery of Clock Error Function is enabled, when it returns to a normal input, a mute condition will
be cancelled automatically.
When Auto Recovery of Clock Error Function is cancelled, it is necessary to control a series of operations called a mute-on
and flag clear command transmission, an internal RAM data clear and mute release from an external microcomputer. Since
it is invalid immediately after a wake-up, 0x0D[6]=0x1 is set up before mute release, and it is recommended to enable this
function.
Valid or invalid auto recover from clock error
Default=0x0
Select Address
0x0D[6]
Value
Explanation of Operation
0x0
Invalid
Valid
0x1
Each error flag can be read from the following addresses. When 0x1 is read from a read address, the error flag establishes.
Moreover, a flag is not cleared until it writes 0x0 in the target address, even if error status will be canceled, once a flag leaves.
Error flag read register
Select Address
0x0E[6]
Explanation of Operation
Synchronous error flag
0x0E[4]
0x0E[3]
0x0E[2]
0x0E[1]
LRCLK stop flag
BCLK stop flag
BCLK high speed detection flag
BCLK low speed detection flag
20 The Wake-up Procedure of Power-up
It has to start power-up in the following procedures.
0x**=0x** means writing data to register. (For example) 0x10=0x00 It means writing data 0x00 to select address 0x10.
1. Power-up (VCCP1, VCCP2, DVDD)
Input BCLK and LRCLK
Wait over 10ms
Input stable BCLK and LRCLK in the specification
Wait over 1ms
2. Release reset (RSTX=High)
Wait over 1ms
3. 0x0C=0x00
: Sampling rate setting
(Set 48kHz: 0x00, 44.1kHz: 0x01, 32kHz: 0x02 to 0x0C address)
: Clock initialization
4. 0xE9=0x10
Wait over 100ms
5. 0x01=0x00: Set RAM clear OFF
6. 0x0D=0x40
: Valid auto recover from clock error
7. 0x0E=0x00: Clear error flag
8. 0x92=0x1D
: PWM setting1
9. 0x93=0x1B: PWM setting2
10. 0x94=0x0F
11. 0x95=0x11
12. 0x90=0x40
13. 0xF4=0x14
14. 0xF3=0x03
15. 0xF2=0x02
16. 0xF8=0x01
Wait over 10ms
: PWM setting3
: PWM setting4
: PWM setting5
: Protect function initialization
: Driver Gain setting (0x03: 26dB, 0x0B: 32dB)
: Stereo application setting (0x02: Stereo, 0x0A: Monaural)
: 0xF4, 0xF3, 0xF2 setting value is fixed
17. Set up DSP function such as volume, BQ, DRC, and Pre-Scaler etc.
18. MUTEX=High : Release mute
(Order from 8 to 12 and 17 can be interchanged.)
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TSZ02201-0C1C0E900720-1-2
31.Aug.2018 Rev.001
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TSZ22111 • 15 • 001
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