BD6590MUV
Technical Note
●PCB Layout
In order to make the most of the performance of BD6590MUV, its PCB layout is very important. Characteristics such as
efficiency and ripple and the likes change greatly with layout patterns, which please note carefully.
Adapter
Battery
4.5V to 30V
4.5V to 5.5V
CVL1
10µF
4.7µH
10LED × 6parallel
CVB1
1µF
2.2µF/50V
CO1
RVT
FAILFLAG SW SW
VBAT
VBAT
1MΩ
10kΩ
PWMDRV
VDET
RVD
10KΩ
26.7kΩ
PWM
PWMPOW
fPWM=100Hz~1kHz
BD6590MUV
RESET
RSTB
TEST
LED1
LED2
LED3
LED4
LED5
LED6
OCPSET
PGND
ROC
each16mA
68kΩ
GND GND
ISET
27kΩ
RISET
Fig. 17 Layout
<Input capacitor CVL1 (10μF) for coil>
Connect input capacitor CVL1 (10μF) as close as possible between coil L1 and PGND.
<Input bypath capacitor CVB1 (1μF) for IC>
Put input bypath capacitor CVB1 (1μF) as close as possible between VBAT and PGND pin.
<Schottky barrier diode SBD>
Connect schottky barrier diode SBD as close as possible between coil1and SW pin.
<Output capacitor CO1>
Connect output capacitor CO1 between cathode of SBD and PGND.
Make both PGND sides of CVL1 and CO1 as close as possible.
<LED current setting resistor RISET(27kΩ)>>
Connect LED current setting resistor RISET(27kΩ) as close as possible between ISET pin and GND.
There is possibility to oscillate when capacity is added to ISET terminal, so pay attention that capacity isn’t added.
<Over current limit setting resistor ROC(68kΩ)>
Connect Over current limit setting resistor ROC(68kΩ) as close as possible between OCPSET pin and GND.
< Over current limit setting resistor RVT(1MΩ) & RVD(26.7kΩ)>
Put over current limit setting resistor RVT(1MΩ) & RVD(26.7kΩ) as close as possible VDET pin so as not to make the
wire longer, which
possibly causes the noise and also detects over voltage protection by mistake.
<Connect to GND and PGND>
GND is analog ground, and PGND is power ground. PGND might cause a lot of noise due to the coil current of PGND.
Try to connect with analog ground, after smoothing with input capacitor CVL1 and output capacitor CO1.
<Heat radiation of back side PAD>
PAD is used for improving the efficiency of IC heat radiation. Solder PAD to GND pin (analog ground).
Moreover, connect ground plane of board using via as shown in the patterns of next page.
The efficiency of heat radiation improves according to the area of ground plane.
<Others>
When those pins are not connected directly near the chip, influence is give to the performance of BD6150, and may limit
the current drive performance. As for the wire to the inductor, make its resistance component small so as to reduce electric
power consumption and increase the entire efficiency.
The layout pattern in consideration of these is shown in the next page.
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.07 - Rev.B
16/26
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