MAX481/MAX483/MAX485/
MAX487–MAX491/MAX1487
Low-Power, Slew-Rate-Limited
RS-485/RS-422 Transceivers
______________________________________________________________Pin Description
ꢁIN
MAX4±ꢅ1MAX4±31
MAX4±51MAX4±71
MAXꢅ4±7
NAME
NAME
FUNCTION
FUNCTION
MAX4±±1
MAX490
MAX4±91
MAX49ꢅ
SIꢁ1ꢃO
µMAX
SIꢁ1ꢃO
µMAX
SIꢁ1ꢃO
Receiver Output: If A > B by 200mV, RO will be high;
If A < B by 200mV, RO will be low.
1
3
2
4
2
RO
Receiver Output Enable. RO is enabled when RE is low; RO is
high impedance when RE is high.
2
3
4
4
5
6
—
—
—
5
3
4
5
RE
Driver Output Enable. The driver outputs, Y and Z, are enabled
by bringing DE high. They are high impedance when DE is low. If
the driver outputs are enabled, the parts function as line drivers.
While they are high impedance, they function as line receivers if
RE is low.
—
3
DE
Driver Input. A low on DI forces output Y low and output Z high.
Similarly, a high on DI forces output Y high and output Z low.
DI
5
—
—
6
7
—
—
8
4
5
6
7
6, 7
9
GND
Y
Ground
Noninverting Driver Output
6
8
10
Z
Inverting Driver Output
—
8
—
2
—
A
Noninverting Receiver Input and Noninverting Driver Output
Noninverting Receiver Input
—
7
—
1
12
A
—
7
—
1
—
B
Inverting Receiver Input and Inverting Driver Output
Inverting Receiver Input
—
8
—
2
11
B
1
3
14
V
CC
Positive Supply: 4.75V ≤ V
≤ 5.25V
CC
—
—
—
—
1, 8, 13
N.C.
No Connect—not internally connected
TOP VIEW
MAX481
MAX483
MAX485
MAX487
MAX1487
R
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
B
DE
A
DI
R
RO
RE
DE
DI
1
8
7
V
D
D
CC
GND
B
B
A
2
3
4
Rt
Rt
DIP/SO
6
5
A
RO
R
D
GND
1
2
3
4
A
B
8
7
6
5
MAX481
MAX483
MAX485
MAX487
MAX1487
V
CC
GND
DI
RE
RO
DE
RE
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
μMAX
Figure 1. MAX481/MAX483/MAX485/MAX487/MAX1487 Pin Configuration and Typical Operating Circuit
Maxim Integrated
7
ROCHESTER [ Rochester Electronics ]
