Application Hints (Continued)
Typical Circuit Connections
reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
VOS Adjustment
Exceeding the positive common-mode limit on a single input
will not change the phase of the output however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
These amplifiers will operate with the common-mode input
voltage equal to the positive supply. In fact, the
common-mode voltage can exceed the positive supply by
approximately 100 mV independent of supply voltage and
over the full operating temperature range. The positive sup-
ply can therefore be used as a reference on an input as, for
example, in a supply current monitor and/or limiter.
00564667
•
•
•
VOS is adjusted with a 25k potentiometer
The potentiometer wiper is connected to V+
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
For potentiometers with temperature coefficient of 100
ppm/˚C or less the additional drift with adjust is ≈ 0.5µV/
˚C/mV of adjustment
±
•
Typical overall drift: 5µV/˚C (0.5µV/˚C/mV of adj.)
Driving Capacitive Loads
All of the bias currents in these amplifiers are set by FET
current sources. The drain currents for the amplifiers are
therefore essentially independent of supply voltage.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize “pickup” and maximize the frequency of the feed-
back pole by minimizing the capacitance from the input to
ground.
00564668
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3dB
frequency of the closed loop gain and consequently there is
negligible effect on stability margin. However, if the feedback
pole is less than approximately six times the expected 3 dB
frequency a lead capacitor should be placed from the output
to the input of the op amp. The value of the added capacitor
should be such that the RC time constant of this capacitor
and the resistance it parallels is greater than or equal to the
original feedback pole time constant.
*
LF155/6 R = 5k
LF357 R = 1.25k
Due to a unique output stage design, these amplifiers
have the ability to drive large capacitive loads and still
maintain stability. CL(MAX) . 0.01µF.
Overshoot ≤ 20%
Settling time (ts) . 5µs
LF357. A Large Power BW Amplifier
00564615
For distortion ≤ 1% and a 20 Vp-p V
swing, power bandwidth is:
OUT
500kHz.
11
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