Single-Channel: 6N135, 6N136 , HCPL2503, HCPL4502 Dual-Channel: HCPL2530, HCPL2531 — High Speed Transistor Optocouplers
Electrical Characteristics
(Continued) (T
A
= 0 to 70°C unless otherwise specified)
Switching Characteristics
(V
CC
= 5V)
Symbol Parameter
T
PHL
Propagation Delay
Time to Logic LOW
Test Conditions
T
A
= 25°C, R
L
= 4.1kΩ,
I
F
= 16mA
(6)
(Fig. 7)
R
L
= 1.9kΩ, I
F
= 16mA,
T
A
= 25°C
(7)
(Fig. 7)
Device
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
6N135
HCPL2530
6N136
HCPL4502
HCPL2503
HCPL2531
Min.
Typ.*
0.45
0.45
Max.
1.5
0.8
Unit
µs
µs
R
L
= 4.1kΩ, I
F
= 16mA
(6)
(Fig. 7)
R
L
= 1.9kΩ, I
F
= 16mA
(7)
(Fig. 7)
2.0
1.0
µs
µs
T
PLH
Propagation Delay
Time to Logic HIGH
T
A
= 25°C, (R
L
= 4.1kΩ,
I
F
= 16mA
(6)
(Fig. 7)
R
L
= 1.9kΩ, I
F
= 16mA
(7)
(Fig. 7)
T
A
= 25°C
0.5
0.3
1.5
0.8
µs
µs
R
L
= 4.1kΩ, I
F
= 16mA
(6)
(Fig. 7)
R
L
= 1.9kΩ, I
F
= 16mA
(7)
(Fig. 7)
2.0
1.0
µs
µs
|CM
H
|
Common Mode
Transient
Immunity at
Logic High
I
F
= 0mA, V
CM
= 10V
P-P
,
R
L
= 4.1kΩ, T
A
= 25°C
(8)
(Fig. 8)
I
F
= 0mA, V
CM
= 10V
P-P
,
R
L
= 1.9kΩ, T
A
= 25°C
(8)
(Fig. 8)
10,000
10,000
V/µs
V/µs
|CM
L
|
Common Mode
Transient
Immunity at
Logic Low
I
F
= 16mA, V
CM
= 10 V
P-P
,
R
L
= 4.1kΩ, T
A
= 25°C
(8)
(Fig. 8)
I
F
= 16mA, V
CM
= 10 V
P-P
,
R
L
= 1.9kΩ
(8)
(Fig. 8)
10,000
10,000
V/µs
V/µs
** All Typicals at T
A
= 25°C
Notes:
6. The 4.1kΩ load represents 1 LSTTL unit load of 0.36mA and 6.1kΩ pull-up resistor.
7. The 1.9kΩ load represents 1 TTL unit load of 1.6mA and 5.6kΩ pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
cm
/dt on the leading edge
of the common mode pulse signal V
CM
, to assure that the output will remain in a logic high state (i.e., V
O
> 2.0V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dV
cm
/dt on the trailing edge
of the common mode pulse signal, V
CM
, to assure that the output will remain in a logic low state (i.e., V
O
< 0.8V).
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
5
ROCHESTER [ Rochester Electronics ]
