欢迎访问ic37.com |
会员登录 免费注册
发布采购

DS2154LA2+ 参数 Datasheet PDF下载

DS2154LA2+图片预览
型号: DS2154LA2+
PDF下载: 下载PDF文件 查看货源
内容描述: [DATACOM, FRAMER, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-100]
分类和应用: 电信电信集成电路
文件页数/大小: 90 页 / 1731 K
品牌: ROCHESTER [ Rochester Electronics ]
 浏览型号DS2154LA2+的Datasheet PDF文件第52页浏览型号DS2154LA2+的Datasheet PDF文件第53页浏览型号DS2154LA2+的Datasheet PDF文件第54页浏览型号DS2154LA2+的Datasheet PDF文件第55页浏览型号DS2154LA2+的Datasheet PDF文件第57页浏览型号DS2154LA2+的Datasheet PDF文件第58页浏览型号DS2154LA2+的Datasheet PDF文件第59页浏览型号DS2154LA2+的Datasheet PDF文件第60页  
DS2154  
10 CLOCK BLOCKING REGISTERS  
The Receive Channel Blocking Registers (RCBR1/RCBR2/RCBR3/RCBR4) and the Transmit Channel  
Blocking Registers (TCBR1/TCBR2/TCBR3/TCBR4) control the RCHBLK and TCHBLK pins,  
respectively. The RCHBLK and TCHCLK pins are user-programmable outputs that can be forced either  
high or low during individual channels. These outputs can be used to block clocks to a USART or LAPD  
controller in ISDN-PRI applications. When the appropriate bits are set to 1, the RCHBLK and TCHCLK  
pins will be held high during the entire corresponding channel time. See the timing diagrams in Section  
14 for an example. The TCBRs have alternate mode of use. Via the CCR3.6 bit, the user has the option to  
use the TCBRs to determine, on a channel-by-channel basis, which signaling bits are to be inserted via  
the TSRs (the corresponding bit in the TCBRs = 1) and which are to be sourced from the TSER or TSIG  
pins (the corresponding bit in the TCBR = 0). See Section 8 for more details about this mode of  
operation.  
RCBR1/RCBR2/RCBR3/RCBR4: RECEIVE CHANNEL BLOCKING  
REGISTERS (Address = 2B to 2E Hex)  
(MSB)  
CH8  
CH16  
CH24  
CH32  
(LSB)  
CH1  
CH7  
CH15  
CH23  
CH31  
CH6  
CH14  
CH22  
CH30  
CH5  
CH13  
CH21  
CH29  
CH4  
CH12  
CH20  
CH28  
CH3  
CH11  
CH19  
CH27  
CH2  
CH10  
CH18  
CH26  
RCBR1 (2B)  
RCBR2 (2C)  
RCBR3 (2D)  
RCBR4 (2E)  
CH9  
CH17  
CH25  
SYMBOL  
POSITION  
NAME AND DESCRIPTION  
CH32  
CH1  
RCBR4.7  
Receive Channel Blocking Registers.  
0 = force the RCHBLK pin to remain low during this channel  
time  
RCBR1.0  
1 = force the RCHBLK pin high during this channel time  
TCBR1/TCBR2/TCBR3/TCBR4: TRANSMIT CHANNEL BLOCKING  
REGISTERS (Address = 22 to 25 Hex)  
(MSB)  
CH8  
CH16  
CH24  
CH32  
(LSB)  
CH7  
CH15  
CH23  
CH31  
CH6  
CH14  
CH22  
CH30  
CH5  
CH13  
CH21  
CH29  
CH4  
CH12  
CH20  
CH28  
CH3  
CH11  
CH19  
CH27  
CH2  
CH10  
CH18  
CH26  
CH1  
TCBR1 (22)  
TCBR1 (23)  
TCBR1 (24)  
TCBR4 (25)  
CH9  
CH17  
CH25  
SYMBOL  
POSITION NAME AND DESCRIPTION  
CH32  
TCBR4.7  
Transmit Channel Blocking Registers.  
0 = force the TCHBLK pin to remain low during this channel  
time  
CH1  
TCBR1.0  
1 = force the TCHBLK pin high during this channel time  
55 of 87