DS2154
2.1 Transmit Side Digital Pins
PIN
NAME
FUNCTION
Transmit Clock. A 2.048MHz primary clock. Used to clock data through the transmit
side formatter. Must be present for the parallel control port to operate properly. If not
present, the Loss of Transmit Clock (LOTC) function can provide a clock.
Transmit Serial Data. Transmit NRZ serial data. Sampled on the falling edge of
TCLK when the transmit side elastic store is disabled. Sampled on the falling edge of
TSYSCLK when the transmit side elastic store is enabled.
Transmit Channel Clock. A 256kHz clock that pulses high during the LSB of each
channel. Synchronous with TCLK when the transmit side elastic store is disabled.
Synchronous with TSYSCLK when the transmit side elastic store is enabled. Useful for
parallel to serial conversion of channel data.
46
TCLK
47
53
TSER
TCHCLK
Transmit Channel Block. A user-programmable output that can be forced high or low
during any of the 32 E1 channels. Synchronous with TCLK when the transmit side
elastic store is disabled. Synchronous with TSYSCLK when the transmit side elastic
store is enabled. Useful for blocking clocks to a serial UART or LAPD controller in
applications where not all E1 channels are used such as Fractional E1, 384kbps (H0),
768kbps, 1920kbps (H12), or ISDN-PRI. Also useful for locating individual channels in
drop-and-insert applications, for external per-channel loopback, and for per-channel
conditioning. See Section 10 for details.
33
TCHBLK
Transmit System Clock. 1.544MHz or 2.048MHz clock. Only used when the transmit
51
34
35
TSYSCLK side elastic store function is enabled. Should be tied low in applications that do not use
the transmit side elastic store. Can be burst at rates up to 8.192MHz.
Transmit Link Clock. 4 kHz or 20kHz demand clock (Sa bits) for the TLINK input.
TLCLK
See Section 12 for details.
Transmit Link Data. If enabled, this pin will be sampled on the falling edge of TCLK
TLINK
TSYNC
for data insertion into any combination of the Sa bit positions (Sa4 to Sa8). See Section
12 for details.
Transmit Sync. A pulse at this pin will establish either frame or multiframe boundaries
for the transmit side. This pin can also be programmed to output either a frame or
multiframe pulse. It is always synchronous with TCLK. See Section 14 for details.
Transmit System Sync. Only used when the transmit side elastic store is enabled. A
pulse at this pin will establish either frame or multiframe boundaries for the transmit
side. Should be tied low in applications that do not use the transmit side elastic store.
Always synchronous with TSYSCLK.
37
52
TSSYNC
TSIG
Transmit Signaling Input. When enabled, this input will sample signaling bits for
insertion into outgoing PCM E1 data stream. Sampled on the falling edge of TCLK
when the transmit side elastic store is disabled. Sampled on the falling edge of
TSYSCLK when the transmit side elastic store is enabled. See Section 14 for details.
Transmit Elastic Store Data Output. Updated on the rising edge of TCLK with data
out of the transmit side elastic store whether the elastic store is enabled or not. This pin
is normally tied to TDATA.
48
49
50
43
42
41
TESO
Transmit Data. Sampled on the falling edge of TCLK with data to be clocked through
the transmit side formatter. This pin is normally tied to TESO.
TDATA
TPOSO
TNEGO
TCLKO
Transmit Positive Data Output. Updated on the rising edge of TCLKO with the
bipolar data out of the transmit side formatter. Can be programmed to source NRZ data
via the Output Data Format (TCR1.7) control bit. This pin is normally tied to TPOSI.
Transmit Negative Data Output. Updated on the rising edge of TCLKO with the
bipolar data out of the transmit side formatter. This pin is normally tied to TNEGI.
Transmit Clock Output. Buffered clock that is used to clock data through the transmit
side formatter (i.e., either TCLK or RCLKO if Loss of Transmit Clock is enabled and in
effect, or RCLKI if remote loopback is enabled). This pin is normally tied to TCLKI.
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ROCHESTER [ Rochester Electronics ]
