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DS2154LA2 参数 Datasheet PDF下载

DS2154LA2图片预览
型号: DS2154LA2
PDF下载: 下载PDF文件 查看货源
内容描述: [DATACOM, FRAMER, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, LQFP-100]
分类和应用:
文件页数/大小: 90 页 / 1731 K
品牌: ROCHESTER [ Rochester Electronics ]
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DS2154  
13.1 Receive Clock and Data Recovery  
The DS2154 contains a digital clock recovery system. See Figure 1-1 and Figure 13-1 for more details.  
The DS2154 couples to the receive E1 shielded twisted pair or coax via a 1:1 transformer. See Table 13-2  
for transformer details. The 2.048MHz clock attached at the MCLK pin is internally multiplied by 16 via  
an internal PLL and fed to the clock recovery system. The clock recovery system uses the clock from the  
PLL circuit to form a 16 times oversampler, which is used to recover the clock and data. This  
oversampling technique offers outstanding jitter tolerance (see Figure 13-2).  
Normally, the clock that is output at the RCLKO pin is the recovered clock from the E1 AMI/B8ZS  
waveform presented at the RTIP and RRING inputs. When no AMI signal is present at RTIP and RRING,  
a Receive Carrier Loss (LRCL) condition will occur and the RCLKO will be sourced from the clock  
applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled, the  
RCLKO output can exhibit slightly shorter high cycles of the clock. This is due to the highly over-  
sampled digital clock recovery circuitry. If the jitter attenuator is placed in the receive path (as is the case  
in most applications), the jitter attenuator restores the RCLK to being close to 50% duty cycle. See the  
Receive AC Timing Characteristics in Section 16 for more details.  
13.2 Transmit Waveshaping and Line Driving  
The DS2154 uses a set of laser-trimmed delay lines along with a precision Digital-to-Analog Converter  
(DAC) to create the waveforms that are transmitted onto the E1 line. The waveforms created by the  
DS2154 meet the ITU G.703 specifications. See Figure 13-3. The user will select which waveform is to  
be generated by properly programming the L2/L1/L0 bits in the Line Interface Control Register (LICR).  
The DS2154 can set up in a number of various configurations depending on the application. See  
Table 13-1 and Figure 13-1.  
Table 13-1. Line Build-Out Select in LICR  
RETURN  
LLL  
210  
RT ()  
APPLICATION  
TRANSFORMER  
LOSS  
(dB)  
(SEE Figure 13-1)  
000  
001  
010  
011  
100  
110  
100  
1:1.15 step-up  
1:1.15 step-up  
1:1.15 step-up  
1:1.15 step-up  
1:1.15 step-up  
1:1.36 step-up  
1:1.36 step-up  
N.M.  
N.M.  
N.M.  
N.M.  
21  
0
0
75normal (See Note 1)  
120normal  
8.2  
8.2  
27  
18  
27  
75with protection resistors  
120with protection resistors  
75with high return loss  
75with high return loss  
120with high return loss  
21  
21  
N.M. = not meaningful  
Note: This LBO is not recommended for use in the DS2154 A2 revision.  
Due to the nature of the design of the transmitter in the DS2154, very little jitter (less than 0.005UIP-P  
broadband from 10Hz to 100kHz) is added to the jitter present on TCLKI. Also, the waveforms that they  
create are independent of the duty cycle of TCLK. The transmitter in the DS2154 couples to the E1  
transmit shielded twisted pair or coax via a 1:1.15 or 1:1.36 step-up transformer as shown in Figure 13-1.  
For the devices to create the proper waveforms, this transformer used must meet the specifications listed  
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