ADV7127–SPECIFICATIONS
3.3 V SOIC SPECIFICATIONS
Parameter
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
DIGITAL AND CONTROL INPUTS
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Current, I
IN
PSAVE Pull-Up Current
Input Capacitance, C
IN
ANALOG OUTPUTS
Output Current
Output Compliance Range, V
OC
Output Impedance, R
OUT
Output Capacitance, C
OUT
Offset Error
Gain Error
3
VOLTAGE REFERENCE (Ext.)
Reference Range, V
REF
POWER DISSIPATION
Digital Supply Current
4
Digital Supply Current
4
Digital Supply Current
4
Analog Supply Current
Analog Supply Current
Standby Supply Current
Power Supply Rejection Ratio
2
1
(V
AA
= +3.0 V–3.6 V, V
REF
= 1.235 V, R
SET
= 560
,
C
L
= 10 pF. All specifications T
MIN
to T
MAX
unless otherwise noted, T
J MAX
= 110 C)
Min
Typ
Max
10
+1
+1
Units
Bits
LSB
LSB
V
V
µA
µA
pF
mA
V
kΩ
pF
% FSR
% FSR
V
mA
mA
mA
mA
mA
mA
%/%
Test Conditions
R
SET
= 680
Ω
R
SET
= 680
Ω
R
SET
= 680
Ω
–1
–1
2.0
0.5
0.25
0.8
–1
20
10
2.0
0
70
10
0
0
1.12
1.235
2.2
6.5
11
32
5
2.4
0.1
18.5
+1.4
+1
V
IN
= 0.0 V or V
DD
0
Tested with DAC Output = 0 V
FSR = 17.62 mA
1.35
5.0
12.0
15
35
5.0
0.5
f
CLK
= 50 MHz
f
CLK
= 140 MHz
f
CLK
= 240 MHz
R
SET
= 560
Ω
R
SET
= 4933
Ω
PSAVE = Low, Digital and Control
Inputs at V
DD
NOTES
1
These max/min specifications are guaranteed by characterization to be over 3.0 V to 3.6 V range.
2
Temperature range T
MIN
to T
MAX
: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
3
Gain error = ((Measured (FSC)/Ideal (FSC) –1)
×
100) , where Ideal = V
REF
/R
SET
×
K
×
(3FFH) and K = 7.9896.
4
Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V
DD
.
Specifications subject to change without notice.
–4–
REV. 0
ROCHESTER [ Rochester Electronics ]
