a
FEATURES
Meets EIA RS-485 Standard
5 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High Z Outputs with Power Off
Superior Upgrade for LTC485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
RO
5 V Low Power
EIA RS-485 Transceiver
ADM485
FUNCTIONAL BLOCK DIAGRAM
ADM485
R
V
CC
RE
B
DE
A
DI
D
GND
GENERAL DESCRIPTION
The ADM485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission and
complies with EIA Standards RS-485 and RS-422. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if during fault condi-
tions a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM485 driver features high output imped-
ance when disabled and when powered down.
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast switching
bipolar technology. All inputs and outputs contain protection
against ESD; all driver outputs feature high source and sink current
capability. An epitaxial layer is used to guard against latch-up.
The ADM485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at data rates up to
5 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
footprint MSOP packages.
REV. E
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
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© 2003 Analog Devices, Inc. All rights reserved.
ROCHESTER [ Rochester Electronics ]
