Data Sheet
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
TEST CIRCUITS
C
L
A/Y
R
60Ω
=
L
OUT
D
R /2
L
1
GENERATOR
50Ω
V
OD
V
CC
2
C
= 15pF
L
V
R /2
OC
L
B/Z
1
2
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
C
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 17. Differential Output Voltage
and Common-Mode Voltage Drivers
Figure 20. Driver Differential Output Delay and Transition Times
V
OM
R
= 27ꢀ
L
375Ω
S1
OUT
2
D
C
= 15pF
1
L
GENERATOR
V
=
CM
–7V TO +12V
50ꢀ
V
R
OD
L
V
D
CC
V
+ V
OL
OH
V
CC
V
=
≈ 1.5V
375Ω
OM
2
1
2
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
C
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 18. Differential Output Voltage Drivers
with Varying Common-Mode Voltage
Figure 21. Driver Propagation Delays
S1
OUT
0V OR 3V
D
2
= 50pF
R
= 110ꢀ
C
L
L
R
V
ID
1
GENERATOR
50ꢀ
0
V
+ V
OL
OH
V =
OM
≈ 1.5V
V
V
I
I
OL
OH
OL
(+)
OH
(–)
2
1
2
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
C
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 19. CMOS Output Voltage High and
CMOS Output Voltage Low Receivers
Figure 22. Driver Enable and Disable Times (tPZH, tPSH, tPHZ)
Rev. E | Page 11 of 20