ADM231L–ADM234L/ADM236L–ADM241L
GENERAL INFORMATION
The ADM231L–ADM234L/ADM236L–ADM241L family of
RS-232 drivers/receivers is designed to solve interface problems
by meeting the EIA-232-E specifications while using a single
digital 5 V supply. The EIA-232-E standard requires that trans-
mitters deliver 5 V minimum on the transmission channel
and that receivers can accept signal levels down to 3 V. The
ADM231L–ADM234L/ADM236L–ADM241L meet these
requirements by integrating step-up voltage converters and
level-shifting transmitters and receivers onto the same chip.
CMOS technology is used to keep the power dissipation to
an absolute minimum. A comprehensive range of transmitter/
receiver combinations is available for most communications needs.
T
Tx INPUT
1
2
T
Tx OUTPUT
800mV
5.00V CH2 5.00V M1.00µs CH1
CH1
Figure 28. Transmitter Output Unloaded Slew Rate
CIRCUIT DESCRIPTION
The ADM236L and ADM241L are particularly useful in
battery-powered systems because they feature a low power
shutdown mode that reduces power dissipation to less than 5 µW.
The internal circuitry in the ADM236L to ADM241L consists of
three main sections: a charge pump voltage converter, RS-232-to-
TTL/CMOS receivers, and TTL/CMOS-to-RS-232 transmitters.
Charge Pump DC-to-DC Voltage Converter
The ADM233L is designed for applications in which space
saving is important because the charge pump capacitors are
molded into the package. The ADM231L and ADM239L
include only a negative charge pump converter and are intended
for applications in which +12 V is available.
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a 1ꢀ V supply from
the 5 V input. This is done in two stages using a switched
capacitor technique, as illustrated in Figure 29 and Figure 3ꢀ.
First, the 5 V input supply is doubled to 1ꢀ V, using capacitor
C1 as the charge storage element. The 1ꢀ V level is then
inverted to generate –1ꢀ V, using C2 as the storage element.
To facilitate sharing a common line or for connection to a
microprocessor data bus, the ADM236L, ADM239L, and
ADM241L feature an enable (EN,
) function. When the
EN
S1
S3
receivers are disabled, their outputs are placed in a high
impedance state.
V
V+ = 2V
CC
CC
C1
C3
S2
S4
V
GND
CC
1
T
SD
V+
INTERNAL
OSCILLATOR
T
Figure 29. Charge Pump Voltage Doubler
T
V–
S1
S3
S4
V+
GND
FROM
VOLTAGE
DOUBLER
+
+
3.1V
CH1 5.00V
CH3 5.00V
CH2 5.00V M50.0µs
CH1
C2
C4
B
W
V+, V– EXITING SD
S2
V– = –(V+)
GND
Figure 26. Charge Pump V+ and V− Exiting Shutdown
INTERNAL
OSCILLATOR
Tx INPUT
T
T
1
2
Figure 30. Charge Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors, C1 and C2,
can be reduced at the expense of higher output impedance on the
V+ and V– supplies, and the V+ and V– supplies can be used to
power external circuitry if the current requirements are small.
Tx OUTPUT
5.00V CH2 5.00V M1.00µs CH1
CH1
800mV
Figure 27. Transmitter Output Loaded Slew Rate
Rev. C | Page 12 of 20
ROCHESTER [ Rochester Electronics ]
