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AD9888KS-140 参数 Datasheet PDF下载

AD9888KS-140图片预览
型号: AD9888KS-140
PDF下载: 下载PDF文件 查看货源
内容描述: [SPECIALTY CONSUMER CIRCUIT, PQFP128, PLASTIC, MQFP-128]
分类和应用: 商用集成电路
文件页数/大小: 33 页 / 1167 K
品牌: ROCHESTER [ Rochester Electronics ]
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AD9888  
Table I. Complete Pinout List  
Pin Type  
Analog Video Inputs RAIN0  
GAIN  
Mnemonic  
Function  
Value  
Pin No.  
Channel 0 Analog Input for Converter R  
Channel 0 Analog Input for Converter G  
Channel 0 Analog Input for Converter B  
Channel 1 Analog Input for Converter R  
Channel 1 Analog Input for Converter G  
Channel 1 Analog Input for Converter B  
0.0 V to 1.0 V 5  
0.0 V to 1.0 V 13  
0.0 V to 1.0 V 20  
0.0 V to 1.0 V 8  
0.0 V to 1.0 V 17  
0.0 V to 1.0 V 23  
0
BAIN  
RAIN  
0
1
GAIN  
BAIN  
1
1
Sync/Clock Inputs  
HSYNC0  
VSYNC0  
SOGIN0  
HSYNC1  
VSYNC1  
SOGIN1  
CLAMP  
COAST  
CKEXT  
CKINV  
Channel 0 Horizontal SYNC Input  
Channel 0 Vertical SYNC Input  
Channel 0 Input for Sync-on-Green  
Channel 1 Horizontal SYNC Input  
Channel 1 Vertical SYNC Input  
Channel 1 Input for Sync-on-Green  
Clamp Input (External CLAMP signal)  
PLL Coast Signal Input  
3.3 V CMOS 45  
3.3 V CMOS 44  
0.0 V to 1.0 V 12  
3.3 V CMOS 43  
3.3 V CMOS 42  
0.0 V to 1.0 V 16  
3.3 V CMOS 30  
3.3 V CMOS 53  
External Pixel Clock Input (to Bypass the PLL) or 10 kto Ground 3.3 V CMOS 54  
ADC Sampling Clock Invert  
3.3 V CMOS 29  
Sync Outputs  
HSOUT  
VSOUT  
SOGOUT  
HSYNC Output Clock (Phase-Aligned with DATACK)  
VSYNC Output Clock (Phase-Aligned with DATACK)  
Sync-on-Green Slicer Output  
3.3 V CMOS 125  
3.3 V CMOS 127  
3.3 V CMOS 126  
Voltage  
REF BYPASS Internal Reference Bypass (Bypass with 0.1 µF to Ground)  
1.25 V 10%  
2
Clamp Voltages  
RMIDSCV  
BMIDSCV  
Red Channel Midscale Clamp Voltage Bypass  
Blue Channel Midscale Clamp Voltage Bypass  
9
24  
PLL Filter  
FILT  
Connection for External Filter Components for Internal PLL  
50  
Power Supply  
VD  
Analog Power Supply  
Output Power Supply  
PLL Power Supply  
Ground  
3.3 V 10%  
3.3 V 10%  
3.3 V 10%  
0 V  
VDD  
PVD  
GND  
Serial Port  
(2-Wire  
Serial Interface)  
SDA  
SCL  
A0  
Serial Port Data I/O  
Serial Port Data Clock  
Serial Port Address Input 1  
3.3 V CMOS 31  
3.3 V CMOS 32  
3.3 V CMOS 33  
Data Outputs  
Red A[7:0]  
Red B[7:0]  
Green A[7:0]  
Green B[7:0]  
Blue A[7:0]  
Blue B[7:0]  
Port A Outputs of Converter “Red.” Bit 7 is the MSB.  
Port B Outputs of Converter “Red.” Bit 7 is the MSB.  
Port A Outputs of Converter “Green.” Bit 7 is the MSB.  
Port B Outputs of Converter “Green.” Bit 7 is the MSB.  
Port A Outputs of Converter “Blue.” Bit 7 is the MSB.  
Port B Outputs of Converter “Blue.” Bit 7 is the MSB.  
3.3 V CMOS 113–120  
3.3 V CMOS 103–110  
3.3 V CMOS 90–97  
3.3 V CMOS 80–87  
3.3 V CMOS 70–77  
3.3 V CMOS 57–64  
Data Clock  
Output  
DATACK  
DATACK  
Data Output Clock  
Data Output Clock Complement  
3.3 V CMOS 123  
3.3 V CMOS 124  
REV. B  
–5–  
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