AD9888
PV
D
3. The 3-Bit Charge Pump Current Register. This register
allows the current that drives the low-pass loop filter to be
varied. The possible current values are listed in Table III.
C
P
C
Z
0.0039F
0.039F
R
Z
3.3k⍀
Table II. VCO Frequency Ranges
FILT
Pixel Clock Range
(MHz)
KVCO Gain
(MHz/V)
PV1
PV0
Figure 6. PLL Loop Filter Detail
0
0
1
1
0
1
0
1
10–41
41–82
82–150
150+
150
150
150
180
Four programmable registers are provided to optimize the
performance of the PLL. These registers are:
1. The 12-Bit Divisor Registers. The input Hsync frequencies
range from 15 kHz to 110 kHz. The PLL multiplies the fre-
quency of the Hsync signal, producing pixel clock frequencies
in the range of 10 MHz to 205 MHz. The Divisor Register
controls the exact multiplication factor. This register may be
set to any value between 221 and 4095. (The divide ratio that
is actually used is the programmed divide ratio plus one.)
Table III. Charge Pump Current/Control Bits
Ip2
Ip1
Ip0
Current (A)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
50
100
150
250
350
500
750
1500
2. The 2-Bit VCO Range Register. To lower the sensitivity of
the output frequency to noise on the control signal, the VCO
operating frequency range is divided into four overlapping
regions. The VCO Range Register sets this operating range.
Because there are only four possible regions, only the two
least significant bits of the VCO Range Register are used.
The frequency ranges for the lowest and highest regions are
shown in Table II.
Table IV. Recommended VCO Range and Charge Pump Current Settings for Standard Display Formats
Refresh
Rate (Hz)
Horizontal
Frequency (kHz)
Standard
Resolution
Pixel Rate (MHz)
VCORNGE
Current
VGA
60
72
75
85
31.5
37.7
37.5
43.3
25.175
31.500
31.500
36.000
00
00
00
00
010
100
100
100
SVGA
XGA
56
60
72
75
85
35.1
37.9
48.1
46.9
53.7
36.000
40.000
50.000
49.500
56.250
00
00
01
01
01
100
101
011
011
011
60
70
75
80
85
48.4
56.5
60.0
64.0
68.3
65.000
75.000
78.750
85.500
94.500
01
01
01
10
10
100
100
101
011
011
SXGA
UXGA
60
75
85
64.0
80.0
91.1
108.000
135.000
157.500
10
10
11
011
100
100
60
65
70
75
85
75.0
81.3
87.5
93.8
106.3
162.000
175.500
189.000
202.500
229.500*
11
11
11
11
10
100
100
101
101
110
QXGA
60
75
260.000*
315.000*
11
11
100
100
*Graphics sampled at 1/2 the incoming pixel rate using Alternate Pixel Sampling mode.
REV. B
–11–
ROCHESTER [ Rochester Electronics ]
