AD9884A–SPECIFICATIONS
Parameter
RESOLUTION
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Offset Voltage
Input Full-Scale Matching
Offset Adjustment Range
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Data to Clock Skew, t
SKEW
t
BUFF
t
STAH
t
DHO
t
DAL
t
DAH
t
DSU
t
STASU
t
STOSU
HSYNC Input Frequency
Maximum PLL Clock Rate
Minimum PLL Clock Rate
PLL Jitter
Sampling Phase Tempco
DIGITAL INPUTS
Input Voltage, High (V
IH
)
Input Voltage, Low (V
IL
)
Input Current, High (I
IH
)
Input Current, Low (I
IL
)
Input Capacitance
DIGITAL OUTPUTS
Output Voltage, High (V
OH
)
Output Voltage, Low (V
OL
)
Duty Cycle
DATACK,
DATACK
Output Coding
25°C
Full
25°C
Full
Full
I
VI
I
VI
VI
Temp
Test
Level
(V
D
= 3.3 V, V
DD
= 3.3 V, PV
D
= 3.3 V, ADC Clock Frequency = Maximum, PLL
Clock Frequency = Maximum, Control Registers Programmed to Default State)
AD9884AKS-100
Min
Typ
Max
8
±
0.5
±
0.5
Guaranteed
±
1.0
±
1.0
±
1.25
±
1.75
AD9884AKS-140
Min
Typ
Max
8
±
0.5
±
0.8
Guaranteed
+1.15/–1.0
+1.25/–1.0
±
1.4
±
2.5
Unit
Bits
LSB
LSB
LSB
LSB
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
Full
Full
Full
Full
25°C
Full
Full
Full
VI
VI
V
I
VI
VI
VI
VI
VI
V
VI
IV
IV
VI
VI
VI
VI
VI
VI
VI
VI
IV
VI
IV
IV
IV
IV
VI
VI
VI
VI
V
VI
VI
IV
0.5
1.0
100
1
1
50
5.0
25
1.30
1.0
280
0.5
22
1.20
7
1.5
23.5
1.25
±
50
22
1.20
7
1.5
23.5
1.25
±
50
1
1
50
5.0
25
1.30
V p-p
V p-p
ppm/°C
µA
µA
mV
%FS
%FS
V
ppm/°C
MSPS
MSPS
ns
µs
µs
µs
µs
µs
ns
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
V
V
µA
µA
pF
V
V
%
100
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
100
400
15
2.5
0.8
–1.0
+1.0
3
V
DD
– 0.1
0.1
45
50
Binary
55
10
+2.0
140
–0.5
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
140
475
15
2.5
0.8
–1.0
+1.0
3
V
DD
– 0.1
0.1
45
50
Binary
55
10
+2.0
110
20
700
1
1000
1
110
20
750
2
1000
2
–2–
REV. C