AD8628/AD8629/AD8630
INPUT OVERVOLTAGE PROTECTION
CH1 = 50mV/DIV
CH2 = 1V/DIV
V
IN
A
= –50
Although the AD8628/AD8629/AD8630 are rail-to-rail input
amplifiers, care should be taken to ensure that the potential
difference between the inputs does not exceed the supply voltage.
Under normal negative feedback operating conditions, the
amplifier corrects its output to ensure that the two inputs are at
the same voltage. However, if either input exceeds either supply
rail by more than 0.3 V, large currents begin to flow through the
ESD protection diodes in the amplifier.
V
0V
0V
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the input
voltage exceeds the supply voltage, these ESD diodes can become
forward-biased. Without current limiting, excessive amounts
of current could flow through these diodes, causing permanent
damage to the device. If inputs are subject to overvoltage,
appropriate series resistors should be inserted to limit the diode
current to less than 5 mA maximum.
V
OUT
TIME (500µs/DIV)
Figure 56. Positive Input Overload Recovery for the AD8628
CH1 = 50mV/DIV
CH2 = 1V/DIV
V
IN
A
= –50
V
OUTPUT PHASE REVERSAL
0V
0V
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs of
these amplifiers can suddenly jump in the opposite direction to
the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
V
OUT
The AD8628/AD8629/AD8630 amplifiers have been carefully
designed to prevent any output phase reversal, provided that
both inputs are maintained within the supply voltages. If one or
both inputs could exceed either supply voltage, a resistor should
be placed in series with the input to limit the current to less than
5 mA. This ensures that the output does not reverse its phase.
TIME (500µs/DIV)
Figure 57. Positive Input Overload Recovery for Competitor A
CH1 = 50mV/DIV
CH2 = 1V/DIV
V
IN
A
= –50
V
OVERLOAD RECOVERY TIME
Many auto-zero amplifiers are plagued by a long overload recovery
time, often in ms, due to the complicated settling behavior of
the internal nulling loops after saturation of the outputs. The
AD8628/AD8629/AD8630 have been designed so that internal
settling occurs within two clock cycles after output saturation
occurs. This results in a much shorter recovery time, less
than ±0 μs, when compared to other auto-zero amplifiers. The
wide bandwidth of the AD8628/AD8629/AD8630 enhances
performance when the parts are used to drive loads that inject
transients into the outputs. This is a common situation when an
amplifier is used to drive the input of switched capacitor ADCs.
0V
0V
V
OUT
TIME (500µs/DIV)
Figure 58. Positive Input Overload Recovery for Competitor B
Rev. I | Page 16 of 24
ROCHESTER [ Rochester Electronics ]
