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AD538ADZ 参数 Datasheet PDF下载

AD538ADZ图片预览
型号: AD538ADZ
PDF下载: 下载PDF文件 查看货源
内容描述: [ANALOG MULTIPLE FUNCTIONS, 0.4 MHz BAND WIDTH, CDIP18, ROHS COMPLIANT, SIDE BRAZED, CERAMIC, DIP-18]
分类和应用:
文件页数/大小: 13 页 / 929 K
品牌: ROCHESTER [ Rochester Electronics ]
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AD538  
ANALOG COMPUTATION OF POWERS AND ROOTS  
It is often necessary to raise the quotient of two input signals to  
a power or take a root. This could be squaring, cubing, square-  
rooting or exponentiation to some noninteger power. Examples  
include power series generation. With the AD538, only one or  
two external resistors are required to set ANY desired power,  
over the range of 0.2 to 5. Raising the basic quantity VZ/VX to a  
power greater than one requires that the gain of the AD538’s log  
ratio subtractor be increased, via an external resistor between  
pins A and D. Similarly, a voltage divider that attenuates the log  
ratio output between points B and C will program the power to  
a value less than one.  
SQUARE ROOT OPERATION  
The explicit square root circuit of Figure 16 illustrates a precise  
method for performing a real-time square root computation. For  
added flexibility and accuracy, this circuit has a scale factor  
adjustment.  
The actual square rooting operation is performed in this circuit  
by raising the quantity VZ /VX to the one-half power via the  
resistor divider network consisting of resistors RB and RC. For  
maximum linearity, the two resistors should be 1% (or better)  
ratio-matched metal film types.  
One volt scaling is achieved by dividing-down the 2 V reference  
and applying approximately 1 V to both the VY and VX inputs.  
In this circuit, the VX input is intentionally set low, to about  
0.95 V, so that the VY input can be adjusted high, permitting a  
5% scale factor trim. Using this trim scheme, the output volt-  
age will be within 3 mV 0.2% of the ideal value over a 10 V  
to 1 mV input range (80 dB). For a decreased input dynamic  
range of 10 mV to 10 V (60 dB) the error is even less; here the  
output will be within 2 mV 0.2% of the ideal value. The  
bandwidth of the AD538 square root circuit is approximately  
280 kHz with a 1 V p-p sine wave with a +2 V dc offset.  
R
A
B
C
12  
A
18  
D
17  
POWERS  
3
V
V
2
Z
m
R
A
V
Z
REF  
m
V
8
V
(
)
O
2
3
4
5
196⍀  
97.6⍀  
64.9⍀  
48.7⍀  
Y
V
10  
Y
15  
V
V
REF  
X
196⍀  
=
R
A
M –1  
R
= R Յ 200⍀  
B
C
R
R
This basic circuit may also be used to compute the cube, fourth  
or fifth roots of an input waveform. All that is required for a  
given root is that the correct ratio of resistors, RC and RB, be  
selected such that their sum is between 150 Ω and 200 Ω.  
B
C
B
2
C
12  
ROOTS  
3
V
V
Z
m
R
R
C
B
V
REF  
Z
m
V
8
V
(
)
1/2  
1/3  
1/4  
1/5  
100⍀  
100⍀  
150⍀  
162⍀  
100⍀  
49.9⍀  
49.9⍀  
40.2⍀  
O
Y
V
The optional absolute value circuit shown preceding the AD538  
allows the use of bipolar input voltages. Only one op amp is  
required for the absolute value function because the IZ input of  
the AD538 functions as a summing junction. If it is necessary to  
preserve the sign of the input voltage, the polarity of the op amp  
output may be sensed and used after the computation to switch  
the sign bit of a D.V.M. chip.  
10  
Y
15  
V
V
REF  
X
R
R
B
C
1
=
–1  
M
Figure 15. Basic Configurations and Transfer Functions  
for the AD538  
V
IN  
1V  
V
OUT  
= 1V  
OPTIONAL  
ABSOLUTE VALUE SECTION  
5k⍀  
I
10k⍀  
Z
1
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
10  
A
D
R
B
20k⍀  
*
100⍀  
LOG  
25k⍀  
V
IN4148  
IN4148  
Z
RATIO  
+V  
7
S
B
I
X
20k⍀  
V
OS  
1
V
20k⍀  
X
2
3
+10V  
+2V  
V
IN  
8
6
25k⍀  
SIGNAL  
GND  
100⍀  
100⍀  
AD OP-07  
OR AD611  
+2V  
4
S
(V TAP  
OS  
PWR  
GND  
INTERNAL  
VOLTAGE  
–V  
TO –V )  
S
+15V  
–15V  
REFERENCE  
AD538  
C
OUTPUT  
25k⍀  
I
V
O
Y
V
OUT  
ANTILOG  
D1  
IN4148  
V
Y
I
LOG  
25k⍀  
1k⍀  
100⍀  
SCALE FACTOR  
TRIM  
R
C
*
RATIO MATCH 1% METAL FILM  
1k⍀  
*
100⍀  
RESISTORS FOR BEST ACCURACY  
Figure 16. Square Root Circuit  
–9–  
REV. D  
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