RT8010/A
` Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
` An example of 2-layer PCB layout is shown in Figure 7
to Figure 8 for reference.
V
V
IN
OUT
L1
RT8010/A
VIN
3
4
Figure 7. Top Layer
LX
C2
1
R1
NC
EN
6
5
FB/VOUT
GND
C3
2
C1
R2
V
IN
R3
Figure 6. EVB Schematic
Figure 8. Bottom Layer
Table 1. Recommended Inductors
Inductance
DCR
(mΩ)
Dimensions
(mm)
Supplier
(uH)
Current Rating (mA)
Series
TAIYO YUDEN
GOTREND
Sumida
2.2
2.2
2.2
4.7
4.7
4.7
1480
1500
1500
1000
1020
1100
60
58
3.00 x 3.00 x 1.50
3.85 x 3.85 x 1.80
NR 3015
GTSD32
75
4.50 x 3.20 x 1.55
4.50 x 3.20 x 1.55
3.00 x 3.00 x 1.50
3.85 x 3.85 x 1.80
CDRH2D14
CDRH2D14
NR 3015
Sumida
135
120
146
TAIYO YUDEN
GOTREND
GTSD32
Table 2. Recommended Capacitors for CIN and COUT
Capacitance
Supplier
Package
Part Number
(uF)
TDK
4.7
603
603
603
603
805
805
805
805
C1608JB0J475M
MURATA
4.7
4.7
10
10
10
10
10
GRM188R60J475KE19
JMK107BJ475RA
TAIYO YUDEN
TAIYO YUDEN
TDK
JMK107BJ106MA
C2012JB0J106M
MURATA
GRM219R60J106ME19
GRM219R60J106KE19
JMK212BJ106RD
MURATA
TAIYO YUDEN
DS8010/A-02 March 2007
www.richtek.com
13
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