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RT8010-18PQW 参数 Datasheet PDF下载

RT8010-18PQW图片预览
型号: RT8010-18PQW
PDF下载: 下载PDF文件 查看货源
内容描述: 为1.5MHz , 1A ,高效率PWM降压型DC / DC转换器 [1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter]
分类和应用: 转换器
文件页数/大小: 15 页 / 398 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT8010/A  
Applications Information  
current is exceeded. This results in an abrupt increase in  
inductor ripple current and consequent output voltage ripple.  
Do not allow the core to saturate!  
The basic RT8010/Aapplication circuit is shown in Typical  
Application Circuit. External component selection is  
determined by the maximum load current and begins with  
the selection of the inductor value and operating frequency  
Different core materials and shapes will change the size/  
current and price/current relationship of an inductor.  
followed by CIN and COUT  
.
Toroid or shielded pot cores in ferrite or permalloy materials  
are small and don't radiate energy but generally cost more  
than powdered iron core inductors with similar  
characteristics. The choice of which style inductor to use  
mainly depends on the price vs size requirements and  
any radiated field/EMI requirements.  
Inductor Selection  
For a given input and output voltage, the inductor value  
and operating frequency determine the ripple current. The  
ripple current ΔIL increases with higher VIN and decreases  
with higher inductance.  
V
f ×L  
V
OUT  
V
IN  
OUT  
ΔI =  
L
× 1−  
CIN and COUT Selection  
The input capacitance, CIN, is needed to filter the  
trapezoidal current at the source of the top MOSFET. To  
prevent large ripple voltage, a low ESR input capacitor  
sized for the maximum RMS current should be used. RMS  
current is given by :  
Having a lower ripple current reduces the ESR losses in  
the output capacitors and the output voltage ripple. Highest  
efficiency operation is achieved at low frequency with small  
ripple current. This, however, requires a large inductor.  
Areasonable starting point for selecting the ripple current  
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the  
highest VIN. To guarantee that the ripple current stays  
below a specified maximum, the inductor value should be  
chosen according to the following equation :  
VOUT  
V
IN  
IRMS = IOUT(MAX)  
1  
V
VOUT  
IN  
This formula has a maximum at VIN = 2VOUT, where  
IRMS = IOUT/2. This simple worst-case condition is  
commonly used for design because even significant  
deviations do not offer much relief.Note that ripple current  
ratings from capacitor manufacturers are often based on  
only 2000 hours of life which makes it advisable to further  
derate the capacitor, or choose a capacitor rated at a higher  
temperature than required. Several capacitors may also  
be paralleled to meet size or height requirements in the  
design.  
V
V
OUT  
OUT  
f × ΔIL(MAX)  
L =  
× 1−  
V
IN(MAX)  
Inductor Core Selection  
Once the value for L is known, the type of inductor must  
be selected. High efficiency converters generally cannot  
afford the core loss found in low cost powdered iron cores,  
forcing the use of more expensive ferrite or mollypermalloy  
cores. Actual core loss is independent of core size for a  
fixed inductor value but it is very dependent on the  
inductance selected. As the inductance increases, core  
losses decrease. Unfortunately, increased inductance  
requires more turns of wire and therefore copper losses  
will increase.  
The selection of COUT is determined by the effective series  
resistance (ESR) that is required to minimize voltage ripple  
and load step transients, as well as the amount of bulk  
capacitance that is necessary to ensure that the control  
loop is stable. Loop stability can be checked by viewing  
the load transient response as described in a later section.  
The output ripple, ΔVOUT, is determined by :  
Ferrite designs have very low core losses and are preferred  
at high switching frequencies, so design goals can  
concentrate on copper loss and preventing saturation.  
Ferrite core material saturates hard, which means that  
inductance collapses abruptly when the peak design  
1
ΔV  
ΔI ESR +  
OUT  
L
8fC  
OUT  
www.richtek.com  
10  
DS8010/A-02 March 2007  
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