RT7270
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT7270.
` Keep the traces of the main current paths as short and
wide as possible.
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
` Put the input capacitor as close as possible to the device
pins (VINandGND).
` SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pick-up.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT7270.
(b) Copper Area = 10mm2,θJA = 64°C/W
` An example of PCB layout guide is shown in Figure 7
for reference.
(c) Copper Area = 30mm2 ,θJA = 54°C/W
(d) Copper Area = 50mm2 ,θJA = 51°C/W
(e) Copper Area = 70mm2 ,θJA = 49°C/W
Figure 5. Thermal Resistance vs. CopperArea Layout
Design
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12
DS7270-01 September 2012
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
