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RT7270N 参数 Datasheet PDF下载

RT7270N图片预览
型号: RT7270N
PDF下载: 下载PDF文件 查看货源
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分类和应用:
文件页数/大小: 14 页 / 244 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT7270  
the long wires can potentially cause a voltage spike at  
VIN large enough to damage the part.  
As shown in Figure 5, the amount of copper area to which  
the SOP-8 (Exposed Pad) is mounted affects thermal  
performance. When mounted to the standard  
SOP-8 (Exposed Pad) pad (Figure 5.a), θJA is 75°C/W.  
Adding copper area of pad under the SOP-8 (Exposed  
Pad) (Figure 5.b) reduces the θJA to 64°C/W. Even further,  
increasing the copper area of pad to 70mm2 (Figure 5.e)  
reduces the θJA to 49°C/W.  
Thermal Considerations  
For continuous operation, do not exceed the maximum  
operation junction temperature 125°C. The maximum  
power dissipation depends on the thermal resistance of  
IC package, PCB layout, the rate of surroundings airflow  
and temperature difference between junction to ambient.  
The maximum power dissipation can be calculated by  
following formula :  
The maximum power dissipation depends on operating  
ambient temperature for fixed TJ(MAX) and thermal  
resistance θJA. The Figure 6 of derating curves allows the  
designer to see the effect of rising ambient temperature  
on the maximum power dissipation allowed.  
PD(MAX) = (TJ(MAX) TA ) / θJA  
Where TJ(MAX) is the maximum operation junction  
temperature , TA is the ambient temperature and the θJA is  
the junction to ambient thermal resistance.  
2.2  
Four-Layer PCB  
2.0  
1.8  
For recommended operating conditions specification, the  
maximum junction temperature is 125°C. The junction to  
ambient thermal resistance θJA is layout dependent. For  
SOP-8 (Exposed Pad) package, the thermal resistance  
Copper Area  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
2
70mm  
2
50mm  
2
30mm  
2
10mm  
Min.Layout  
θJA is 75°C/W on the standard JEDEC 51-7 four-layers  
thermal test board. The maximum power dissipation at  
TA = 25°C can be calculated by following formula :  
PD(MAX) = (125°C 25°C) / (75°C/W) = 1.333W  
(min.copper area PCB layout)  
0
25  
50  
75  
100  
125  
Ambient Temperature (°C)  
PD(MAX) = (125°C 25°C) / (49°C/W) = 2.04W  
(70mm2copper area PCB layout)  
Figure 6.Derating Curve of Maximum PowerDissipation  
The thermal resistance θJA of SOP-8 (Exposed Pad) is  
determined by the package architecture design and the  
PCB layout design. However, the package architecture  
design had been designed. If possible, it's useful to  
increase thermal performance by the PCB layout copper  
design. The thermal resistance θJA can be decreased by  
adding copper area under the exposed pad of SOP-8  
(Exposed Pad) package.  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS7270-03 March 2018  
www.richtek.com  
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