RT7205A
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
(Exposed Pad)
Pin Name
V_TR
CS+
CS-
D-
D+
CC_GND
CC1
CC2
RT
IFB
VFB
OPTO
OVP
USBP
VDD
VDD
AGND
V2
V5
VCP
V9
VG
PGND
BLD
GND
Type
AI
AI
AI
A/D IO
A/D IO
GND
A/D IO
A/D IO
A/D I
AI
AI
AO
AO
D IO
PWR
PWR
GND
PWR
PWR
AO
PWR
AO
GND
D IO
GND
Pin Function
Transformer voltage sense node.
Positive input of a current-sense amplifier for output current sensing.
Negative input of a current-sense amplifier for output current sensing.
USB D- channel.
USB D+ channel.
Alternative ground for CC1 and CC2.
Type-C connector Configuration Channel (CC) 1, used to detect a cable
plug event and determine the cable orientation.
Type-C connector Configuration Channel (CC) 2, used to detect a cable
plug event and determine the cable orientation.
Remote thermal sensor connection node for over-temperature protection.
Feedback input for the constant-current loop.
Feedback input for the constant-voltage loop.
Current sink output for optocoupler connection.
Over-voltage fault indication output, used to pull low an optocoupler.
Control signal of the blocking N-MOSFET
Supply input voltage.
Supply input voltage.
Analog ground.
Regulated DC bias to supply for the MCU.
Regulated DC bias to supply for internal circuitry.
Charge pump driver output.
Regulated DC bias to supply for the synchronous rectifier driver.
Gate driver output for the SR MOSFET.
Power ground.
Bleeder connection node to provide another path to discharge the output
capacitor.
Power ground. The exposed pad must be connected to GND and well
soldered to a large PCB copper area for maximum power dissipation.
Copyright
©
2018 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS7205A-00
February 2018
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
