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RT6908ZQW 参数 Datasheet PDF下载

RT6908ZQW图片预览
型号: RT6908ZQW
PDF下载: 下载PDF文件 查看货源
内容描述: [PMIC for TFT LCD TV Panels]
分类和应用: 集成电源管理电路电视
文件页数/大小: 22 页 / 429 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT6908  
curve in Figure 5 allows the designer to see the effect of  
rising ambient temperature on the maximum power  
dissipation.  
Layout Consideration  
For high frequency switching power supplies, the PCB  
layout is important to get good regulation, high efficiency  
and stability. The following descriptions are the guidelines  
for better PCB layout.  
3.2  
Four-Layer PCB  
2.8  
` For good regulation, place the power components as  
close as possible. The traces should be wide and short  
enough especially for the high current loop.  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
` The compensation circuit should be kept away from  
the power loops and be shielded with a ground trace to  
prevent any noise coupling.  
` Minimize the size of all LX nodes and keep them wide  
and shorter.  
0
25  
50  
75  
100  
125  
` The exposed pad of the chip should be connected to a  
Ambient Temperature (°C)  
strong ground plane for maximum thermal consideration.  
Figure 5.Derating Curve for the RT6908 Package  
Place the power components as close as  
possible. The traces should be wide and  
short especially for the high current loop.  
Separate power ground (PGND) and analog ground  
(AGND). Connect the AGND and the PGND islands  
at a single end. Make sure that there are no other  
connections between these separate ground planes.  
C11  
L2  
V
I/O  
V
IN  
C21  
C13  
C12  
R3  
R2  
C20  
Place the power components  
as close as possible.  
40 39 38 37 36 35 34 33 32 31  
AGND  
1
2
PGND  
FBB1  
COMP1  
RSTB  
SDA  
30  
29  
28  
27  
26  
25  
BOOT2  
LXB2  
DHB2  
NC  
DLB2  
ILIMIT2  
FBB2  
COMP2  
CRST  
DRVN  
V
CORE  
R4  
C19  
M1  
M2  
3
L3  
4
5
C24  
The compensation circuit  
PGND  
6
SCL  
should be kept away from the  
power loops and should be  
shielded with a ground trace  
to prevent any noise coupling.  
PGND  
R11  
R23  
7
VDET  
AVDD  
GD  
24  
23  
22  
21  
8
AVDD  
41  
R12  
C25  
AGND  
9
10  
LXI  
The compensation circuit should be  
kept away from the power loops and  
should be shielded with a ground  
trace to prevent any noise coupling.  
11 12 13 14 15 16 17 18 19 20  
C28  
C54  
AGND  
R38  
C26  
The exposed pad of the chip  
should be connected to ground  
plane for thermal consideration.  
L1  
D1  
Q1  
C5  
AVDD  
Place the power components as  
close as possible. The traces should  
be wide and short especially for the  
high-current loop.  
V
IN  
C2  
C1  
PGND  
V
IN  
The power ground (PGND) consists of input and output  
capacitor grounds, the components's ground of charge  
pump. The PGND should be wide and short enough to  
connect to a ground plane.  
Figure 6. PCB Layout Guide  
Copyright 2013 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
DS6908-01 March 2013  
www.richtek.com  
21  
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