RT6551A/B
Functional Pin Description
Pin No.
1
2
3, 21
(Exposed Pad)
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
S3
S5
TON
PGOOD
VID
VDD
CS
PGND
LGATE
PHASE
UGATE
BOOT
VLDOIN
VTT
Power Ground for the VTT LDO.
Voltage Sense Input for the VTT LDO. Connect to the terminal of the VTT_LDO
output capacitor.
The exposed pad must be soldered to a large PCB and connected to GND for
maximum power dissipation.
VTTREF Buffered Reference Output.
Reference Input for VTT and VTTREF.
Feedback Voltage Input. Connect to a resistive voltage divider from VDDQ to
GND to adjust the output voltage.
VTT LDO Enable Control Input. Do not leave this pin floating.
PWM Enable Control Input. Do not leave this pin floating.
Set the UGATE On-Time Through a Pull-Up Resistor Connecting to VIN.
Power Good Open-Drain Output. In high state when VDDQ output voltage is
within the target range.
Internal Reference Voltage Setting.
Supply Voltage Input for the Analog Supply and LGATE Gate Driver.
Current Limit Threshold Setting Input. Connect to GND through the voltage
setting resistor.
Power Ground for Low-Side MOSFET.
Low-Side Gate Driver Output for VDDQ.
Switch Node. External inductor connection for VDDQ and behave as the current
sense comparator input for Low-Side MOSFET R
DS(ON)
sensing.
High-Side Gate Driver Output for VDDQ.
Bootstrap Supply for High-Side Gate Driver.
Power Supply for VTT LDO.
Power Output for the VTT LDO.
Pin Function
Copyright
©
2015 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS6551A/B-00 May 2015
www.richtek.com
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