RT6255A/B
EN
Feedforward Capacitor (CFF)
R
EN
V
EN
The RT6255A/B is optimized for ceramic output capacitors
and for low duty cycle applications. However for high-output
voltages, with high feedback attenuation, the circuit's
transient response can be slowed. In high-output voltage
circuits transient response is improved by adding a small
“feedforward” capacitor (CFF) across the upper FB divider
resistor (Figure 1), to speed up the transient response
without affecting the steady-state stability of the circuit.
Choose a suitable capacitor value that following suggested
component BOM.
IN
RT6255A/B
C
EN
GND
Figure 2. External Timing Control
R
100k
EN
V
EN
RT6255A/B
GND
IN
Q1
Enable
V
OUT
Figure 3. Digital Enable Control Circuit
R1
R
C
EN1
FF
V
IN
EN
FB
RT6255A/B
R
EN2
RT6255A/B
GND
R2
GND
Figure 4. ResistorDivider for Lockout Threshold Setting
Figure 1. CFF Capacitor Setting
Output Voltage Setting
Set the desired output voltage using a resistive divider
Enable Operation (EN)
from the output to ground with the midpoint connected to
For automatic start-up the high-voltage EN pin can be
connected to VIN, through a 100kΩ resistor. Its large
hysteresis band makes EN useful for simple delay and
timing circuits. EN can be externally pulled to VIN by
adding a resistor-capacitor delay (REN and CEN in Figure
2). Calculate the delay time using EN's internal threshold
where switching operation begins.
FB. The output voltage is set according to the following
equation :
R1
R2
VOUT 0.6V(1 +
)
V
OUT
R1
FB
RT6255A/B
An external MOSFET can be added to implement digital
control of EN when no system voltage above 2V is available
(Figure 3). In this case, a 100kΩ pull-up resistor, REN, is
connected between VINand the ENpin. MOSFET Q1 will
be under logic control to pull down the ENpin. To prevent
enabling circuit when VIN is smaller than the VOUT target
value or some other desired voltage level, a resistive voltage
divider can be placed between the input voltage and ground
and connected to EN to create an additional input under
voltage lockout threshold (Figure 4).
R2
GND
Figure 5. Output Voltage Setting
Place the FB resistors within 5mm of the FB pin. Choose
R2 between 10kΩ and 100kΩ to minimize power
consumption without excessive noise pick-up and
calculate R1 as follows :
R2(V
V
REF
)
OUT
REF
R1
V
Copyright 2017 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS6255A/B-02 March 2017
www.richtek.com
15
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
